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gpu: nvgpu: gv11b: fix fb flush issue

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membar.sys does synchronization with the whole system (GPU and CPU),
membar.gl does synchronization within the GPU.
In gv11b, fb flush is generating membar.gl instead of membar.sys, which
is an issue. To fix this issue. following WAR is used:
1. Use bar1 engine id and bind it to a particular pdb,
2. Then instead of a fb_flush, issue a tlb invalidate of the bar1 pdb.

Now allocation of vm for bar1 instance block and bar1 binding is done
without check for bar1 support. Only bar1 register mapping is done
based on bar1 support enabled.

Bug 2112790

Change-Id: I76f43f1178a68f10823d48bc9da55d2bd686dd52
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1750257
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
seshendra Gadagottu
2018-06-14 12:41:03 -07:00
committed by mobile promotions
parent cd6e821cf6
commit a012527dbd
4 changed files with 15 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
drivers/gpu/nvgpu/common/mm/mm.c
View File

@@ -159,10 +159,8 @@ static void nvgpu_remove_mm_support(struct mm_gk20a *mm)
if (g->ops.mm.remove_bar2_vm)
g->ops.mm.remove_bar2_vm(g);
if (g->ops.mm.is_bar1_supported(g)) {
nvgpu_free_inst_block(g, &mm->bar1.inst_block);
nvgpu_vm_put(mm->bar1.vm);
}
nvgpu_free_inst_block(g, &mm->bar1.inst_block);
nvgpu_vm_put(mm->bar1.vm);
nvgpu_free_inst_block(g, &mm->pmu.inst_block);
nvgpu_free_inst_block(g, &mm->hwpm.inst_block);
@@ -377,11 +375,10 @@ static int nvgpu_init_mm_setup_sw(struct gk20a *g)
if (err)
return err;
if (g->ops.mm.is_bar1_supported(g)) {
err = nvgpu_init_bar1_vm(mm);
if (err)
return err;
}
err = nvgpu_init_bar1_vm(mm);
if (err)
return err;
if (g->ops.mm.init_bar2_vm) {
err = g->ops.mm.init_bar2_vm(g);
if (err)

3
drivers/gpu/nvgpu/gv11b/hal_gv11b.c
View File

@@ -24,6 +24,7 @@
#include "common/bus/bus_gk20a.h"
#include "common/bus/bus_gp10b.h"
#include "common/bus/bus_gm20b.h"
#include "common/clock_gating/gv11b_gating_reglist.h"
#include "common/ptimer/ptimer_gk20a.h"
@@ -745,7 +746,7 @@ static const struct gpu_ops gv11b_ops = {
.bus = {
.init_hw = gk20a_bus_init_hw,
.isr = gk20a_bus_isr,
.bar1_bind = NULL,
.bar1_bind = gm20b_bus_bar1_bind,
.bar2_bind = gp10b_bus_bar2_bind,
.set_bar0_window = gk20a_bus_set_bar0_window,
},

6
drivers/gpu/nvgpu/gv11b/mm_gv11b.c
View File

@@ -249,7 +249,11 @@ void gv11b_mm_l2_flush(struct gk20a *g, bool invalidate)
g->ops.mm.fb_flush(g);
gk20a_mm_l2_flush(g, invalidate);
g->ops.mm.fb_flush(g);
if (g->ops.bus.bar1_bind)
g->ops.fb.tlb_invalidate(g,
g->mm.bar1.vm->pdb.mem);
else
g->ops.mm.fb_flush(g);
}
/*

3
drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
View File

@@ -21,6 +21,7 @@
*/
#include "common/bus/bus_gk20a.h"
#include "common/bus/bus_gm20b.h"
#include "common/clock_gating/gv11b_gating_reglist.h"
#include <gk20a/gk20a.h>
@@ -597,7 +598,7 @@ static const struct gpu_ops vgpu_gv11b_ops = {
.bus = {
.init_hw = gk20a_bus_init_hw,
.isr = gk20a_bus_isr,
.bar1_bind = NULL,
.bar1_bind = gm20b_bus_bar1_bind,
.bar2_bind = NULL,
.set_bar0_window = gk20a_bus_set_bar0_window,
},