From a12c627574387ebd708407bab83096d925cf390d Mon Sep 17 00:00:00 2001 From: Preetham Chandru Ramchandra Date: Fri, 25 Oct 2019 16:10:21 +0530 Subject: [PATCH] gpu: nvgpu: define P-state as a platform variable move P-state enabling from chip level to platform level. Bug 200559157 Change-Id: Ie71dc801583678dc3a19f2a8438e477e46053591 Signed-off-by: Preetham Chandru Ramchandra Reviewed-on: https://git-master.nvidia.com/r/2223300 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/hal/init/hal_gm20b.c | 1 - drivers/gpu/nvgpu/hal/init/hal_gp10b.c | 1 - drivers/gpu/nvgpu/hal/init/hal_tu104.c | 4 ---- drivers/gpu/nvgpu/os/linux/driver_common.c | 8 ++++++++ drivers/gpu/nvgpu/os/linux/pci.c | 2 ++ drivers/gpu/nvgpu/os/linux/platform_gk20a.h | 3 +++ 6 files changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c index 4e74b449a..a24d3f95a 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c @@ -1205,7 +1205,6 @@ int gm20b_init_hal(struct gk20a *g) gops->semaphore_wakeup = nvgpu_channel_semaphore_wakeup; nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true); - nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); #ifdef CONFIG_NVGPU_FECS_TRACE nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, false); nvgpu_set_enabled(g, NVGPU_FECS_TRACE_FEATURE_CONTROL, false); diff --git a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c index 894fa8b13..3e046708d 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c @@ -1292,7 +1292,6 @@ int gp10b_init_hal(struct gk20a *g) gops->semaphore_wakeup = nvgpu_channel_semaphore_wakeup; nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true); - nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); #ifdef CONFIG_NVGPU_FECS_TRACE nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, false); nvgpu_set_enabled(g, NVGPU_FECS_TRACE_FEATURE_CONTROL, false); diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c index 6ea530ae7..d4f8e3bd7 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c +++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c @@ -1677,9 +1677,6 @@ int tu104_init_hal(struct gk20a *g) nvgpu_gr_falcon_load_ctxsw_ucode; #endif - /* Disable pmu pstate, as there is no pmu support */ - nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); - nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, false); /* Disable fb mem_unlock */ @@ -1694,7 +1691,6 @@ int tu104_init_hal(struct gk20a *g) } else #endif { - nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, true); nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true); } diff --git a/drivers/gpu/nvgpu/os/linux/driver_common.c b/drivers/gpu/nvgpu/os/linux/driver_common.c index 91654c909..9c6e65d11 100644 --- a/drivers/gpu/nvgpu/os/linux/driver_common.c +++ b/drivers/gpu/nvgpu/os/linux/driver_common.c @@ -206,6 +206,14 @@ static void nvgpu_init_pm_vars(struct gk20a *g) } nvgpu_set_enabled(g, NVGPU_SUPPORT_ASPM, !platform->disable_aspm); +#ifdef CONFIG_NVGPU_SIM + if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) { + nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); + } else +#endif + { + nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, platform->pstate); + } } static void nvgpu_init_vbios_vars(struct gk20a *g) diff --git a/drivers/gpu/nvgpu/os/linux/pci.c b/drivers/gpu/nvgpu/os/linux/pci.c index c382fddfb..5c86b8ee4 100644 --- a/drivers/gpu/nvgpu/os/linux/pci.c +++ b/drivers/gpu/nvgpu/os/linux/pci.c @@ -95,6 +95,7 @@ static struct gk20a_platform nvgpu_pci_device[] = { .can_elcg = false, .disable_aspm = true, + .pstate = true, /* power management callbacks */ .is_railgated = nvgpu_pci_tegra_is_railgated, @@ -136,6 +137,7 @@ static struct gk20a_platform nvgpu_pci_device[] = { .can_elcg = false, .disable_aspm = true, + .pstate = true, /* power management callbacks */ .is_railgated = nvgpu_pci_tegra_is_railgated, diff --git a/drivers/gpu/nvgpu/os/linux/platform_gk20a.h b/drivers/gpu/nvgpu/os/linux/platform_gk20a.h index 6270fbc05..c02c2b7b0 100644 --- a/drivers/gpu/nvgpu/os/linux/platform_gk20a.h +++ b/drivers/gpu/nvgpu/os/linux/platform_gk20a.h @@ -85,6 +85,9 @@ struct gk20a_platform { /* Set if the platform can unify the small/large address spaces. */ bool unify_address_spaces; + /* P-state */ + bool pstate; + /* Clock configuration is stored here. Platform probe is responsible * for filling this data. */ struct clk *clk[GK20A_CLKS_MAX];