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gpu: nvgpu: Disable illegal comptag interrupt

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Illegal comptag interrupt is triggered when a page is mapped with
two different kinds with incompatible compression status. This can
be intentional, so disable the interrupt.

Change-Id: I84a212beac147991d09d2d381a9e770b1364f4d8
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1029663
(cherry picked from commit 819607a768f9fccdd0b233d58bcf88b9eee4ee19)
Reviewed-on: http://git-master/r/1031010
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Terje Bergstrom
2016-03-11 07:55:30 -08:00
parent a9b9597a10
commit a13a4124c7
4 changed files with 22 additions and 7 deletions
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6
drivers/gpu/nvgpu/gk20a/hw_ltc_gk20a.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2012-2014, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2012-2016, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -258,6 +258,10 @@ static inline u32 ltc_ltcs_ltss_intr_en_evicted_cb_m(void)
{
return 0x1 << 20;
}
static inline u32 ltc_ltcs_ltss_intr_en_illegal_compstat_m(void)
{
return 0x1 << 21;
}
static inline u32 ltc_ltc0_lts0_intr_r(void)
{
return 0x00141020;

14
drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
View File

@@ -1,9 +1,7 @@
/*
* drivers/video/tegra/host/gk20a/ltc_gk20a.c
* GK20A L2
*
* GK20A Graphics
*
* Copyright (c) 2011-2015, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2011-2016, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -173,9 +171,17 @@ out:
static void gk20a_ltc_init_fs_state(struct gk20a *g)
{
u32 reg;
gk20a_dbg_info("initialize gk20a L2");
g->max_ltc_count = g->ltc_count = 1;
/* Disable LTC interrupts */
reg = gk20a_readl(g, ltc_ltcs_ltss_intr_r());
reg &= ~ltc_ltcs_ltss_intr_en_evicted_cb_m();
reg &= ~ltc_ltcs_ltss_intr_en_illegal_compstat_m();
gk20a_writel(g, ltc_ltcs_ltss_intr_r(), reg);
}
static void gk20a_ltc_isr(struct gk20a *g)

6
drivers/gpu/nvgpu/gm20b/hw_ltc_gm20b.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -286,6 +286,10 @@ static inline u32 ltc_ltcs_ltss_intr_en_illegal_compstat_access_m(void)
{
return 0x1 << 30;
}
static inline u32 ltc_ltcs_ltss_intr_en_illegal_compstat_m(void)
{
return 0x1 << 21;
}
static inline u32 ltc_ltc0_lts0_intr_r(void)
{
return 0x0014040c;

3
drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
View File

@@ -1,7 +1,7 @@
/*
* GM20B L2
*
* Copyright (c) 2014-2015 NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2014-2016 NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -190,6 +190,7 @@ void gm20b_ltc_init_fs_state(struct gk20a *g)
reg = gk20a_readl(g, ltc_ltcs_ltss_intr_r());
reg &= ~ltc_ltcs_ltss_intr_en_evicted_cb_m();
reg &= ~ltc_ltcs_ltss_intr_en_illegal_compstat_access_m();
reg &= ~ltc_ltcs_ltss_intr_en_illegal_compstat_m();
gk20a_writel(g, ltc_ltcs_ltss_intr_r(), reg);
}