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gpu: nvgpu: compile out vidmem from safety build

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Safety build does not support vidmem. This patch compiles out vidmem
related changes - vidmem, dma alloc, cbc/acr/pmu alloc based on
vidmem and corresponding tests like pramin, page allocator &
gmmu_map_unmap_vidmem..
As vidmem is applicable only in case of DGPUs the code is compiled
out using CONFIG_NVGPU_DGPU.

JIRA NVGPU-3524

Change-Id: Ic623801112484ffc071195e828ab9f290f945d4d
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132773
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2019-06-07 19:58:11 +05:30
committed by mobile promotions
parent c2eb26436a
commit a16cc2dde3
56 changed files with 253 additions and 444 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
userspace/Makefile.configs
View File

@@ -40,11 +40,9 @@ CONFIGS := \
-DNVCPU_IS_AARCH64=1 \
-DCONFIG_TEGRA_IOVMM=0 \
-DCONFIG_ARCH_TEGRA_18x_SOC=1 \
-DCONFIG_GK20A_VIDMEM=1 \
-DCONFIG_PCI_MSI \
-DCONFIG_SUPPORT_PMU_PSTATE \
-DNVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
# Uncomment these to enable the config.
# CONFIGS += -DCONFIG_NVGPU_TRACK_MEM_USAGE=y
# CONFIGS += -DCONFIG_GK20A_VIDMEM

235
userspace/required_tests.json
View File

@@ -589,11 +589,6 @@
"test_level": 0,
"unit": "nvgpu_mem"
},
{
"test": "nvgpu_mem_vidmem",
"test_level": 0,
"unit": "nvgpu_mem"
},
{
"test": "nvgpu_mem_wr_rd",
"test_level": 0,
@@ -804,206 +799,6 @@
"test_level": 0,
"unit": "nvgpu_tsg"
},
{
"test": "add_empty_slab",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "add_full_slab",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "add_partial_slab",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "add_second_full_slab",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "add_second_partial_slab",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "alloc_fault_at_alloc_cache",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "alloc_fault_at_nvgpu_alloc",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "alloc_fault_at_sgl_alloc",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "alloc_fixed_no_scatter_gather",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "alloc_more_than_available",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "alloc_no_scatter_gather",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "contiguous_alloc_512K",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "destroy",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "destroy_slabs",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "fixed_alloc_128K",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "fixed_alloc_8K",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "fixed_alloc_fault_at_alloc_cache",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "fixed_alloc_fault_at_sgl_alloc",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "free_32K_alloc",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "free_alloc_512K",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "free_fixed_128K",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "free_fixed_no_scatter_gather",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "free_fixed_no_scatter_gather_again",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "free_no_scatter_gather",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "free_no_scatter_gather_again",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "free_slab",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "init",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "init_slabs",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "no_more_slabs",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "ops",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "revert_partial_slab",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "revert_second_partial_slab",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "sgt_ops",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "simple_32K_alloc",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "simple_alloc_512K",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "slabs_alloc_32K",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "slabs_alloc_8K",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "slabs_fault_at_alloc_cache",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "slabs_fault_at_page_cache",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "slabs_fault_at_sgl_alloc",
"test_level": 0,
"unit": "page_allocator"
},
{
"test": "gmmu_clean",
"test_level": 0,
@@ -1094,11 +889,6 @@
"test_level": 0,
"unit": "page_table"
},
{
"test": "gmmu_map_unmap_vidmem",
"test_level": 0,
"unit": "page_table"
},
{
"test": "gmmu_set_pte",
"test_level": 0,
@@ -1517,31 +1307,6 @@
"test_level": 0,
"unit": "posix_mockio"
},
{
"test": "nvgpu_pramin_dying",
"test_level": 0,
"unit": "pramin"
},
{
"test": "nvgpu_pramin_free_test_env",
"test_level": 0,
"unit": "pramin"
},
{
"test": "nvgpu_pramin_memset",
"test_level": 0,
"unit": "pramin"
},
{
"test": "nvgpu_pramin_rd_n_1_sgl",
"test_level": 0,
"unit": "pramin"
},
{
"test": "nvgpu_pramin_wr_n_3_sgl",
"test_level": 0,
"unit": "pramin"
},
{
"test": "batch",
"test_level": 0,

2
userspace/units/mm/allocators/buddy_allocator/buddy_allocator.c
View File

@@ -73,9 +73,11 @@ static struct vm_gk20a *init_vm_env(struct unit_module *m, struct gk20a *g,
gp10b_mm_get_default_big_page_size;
g->ops.mm.gmmu.get_mmu_levels = gp10b_mm_get_mmu_levels;
#ifdef CONFIG_NVGPU_DGPU
/* Minimum HAL init for PRAMIN */
g->ops.bus.set_bar0_window = gk20a_bus_set_bar0_window;
g->ops.pramin.data032_r = pram_data032_r;
#endif
/* vm should init with SYSMEM */
nvgpu_set_enabled(g, NVGPU_MM_UNIFIED_MEMORY, true);

5
userspace/units/mm/allocators/page_allocator/page_allocator.c
View File

@@ -33,6 +33,8 @@
#include <nvgpu/page_allocator.h>
#ifdef CONFIG_NVGPU_DGPU
#define BA_DEFAULT_BASE SZ_4K
#define BA_DEFAULT_LENGTH SZ_1M
#define BA_DEFAULT_BLK_SIZE SZ_4K
@@ -589,8 +591,10 @@ static int test_nvgpu_page_allocator_init(struct unit_module *m,
return UNIT_SUCCESS;
}
#endif
struct unit_module_test page_allocator_tests[] = {
#ifdef CONFIG_NVGPU_DGPU
/* These tests create and evaluate page_allocator w/o 4K VIDMEM pages */
UNIT_TEST(init, test_nvgpu_page_allocator_init, NULL, 0),
UNIT_TEST(ops, test_nvgpu_page_allocator_ops, NULL, 0),
@@ -668,6 +672,7 @@ struct unit_module_test page_allocator_tests[] = {
UNIT_TEST(no_more_slabs, test_page_alloc, (void *) &failing_alloc_16K, 0),
UNIT_TEST(destroy_slabs, test_nvgpu_page_allocator_destroy, NULL, 0),
#endif
};
UNIT_MODULE(page_allocator, page_allocator_tests, UNIT_PRIO_NVGPU_TEST);

4
userspace/units/mm/gmmu/page_table/page_table.c
View File

@@ -212,6 +212,7 @@ static struct test_parameters test_iommu_sysmem_adv_small_sparse = {
.special_null_phys = true,
};
#ifdef CONFIG_NVGPU_DGPU
static struct test_parameters test_no_iommu_vidmem = {
.aperture = APERTURE_VIDMEM,
.is_iommuable = false,
@@ -219,6 +220,7 @@ static struct test_parameters test_no_iommu_vidmem = {
.flags = NVGPU_VM_MAP_CACHEABLE,
.priv = false,
};
#endif
static struct test_parameters test_no_iommu_sysmem_noncacheable = {
.aperture = APERTURE_SYSMEM,
@@ -1190,8 +1192,10 @@ struct unit_module_test nvgpu_gmmu_tests[] = {
(void *) &test_iommu_sysmem_ro_fixed, 0),
UNIT_TEST(gmmu_map_unmap_no_iommu_sysmem, test_nvgpu_gmmu_map_unmap,
(void *) &test_no_iommu_sysmem, 0),
#ifdef CONFIG_NVGPU_DGPU
UNIT_TEST(gmmu_map_unmap_vidmem, test_nvgpu_gmmu_map_unmap,
(void *) &test_no_iommu_vidmem, 0),
#endif
UNIT_TEST(gmmu_map_unmap_iommu_sysmem_coh, test_nvgpu_gmmu_map_unmap,
(void *) &test_iommu_sysmem_coh, 0),
UNIT_TEST(gmmu_set_pte, test_nvgpu_gmmu_set_pte,

9
userspace/units/mm/nvgpu_mem/nvgpu_mem.c
View File

@@ -58,6 +58,7 @@
static struct nvgpu_mem *test_mem;
#ifdef CONFIG_NVGPU_DGPU
/*
* Pramin write callback (for all nvgpu_writel calls).
* No-op as callbacks/functions are already tested in pramin module.
@@ -197,6 +198,7 @@ static int test_nvgpu_mem_vidmem(struct unit_module *m,
return UNIT_SUCCESS;
}
#endif
/*
* Test nvgpu_aperture_mask()
@@ -210,6 +212,7 @@ static int test_nvgpu_aperture_mask(struct unit_module *m,
u32 vidmem_mask = 4;
u32 ret_ap_mask;
#ifdef CONFIG_NVGPU_DGPU
/* Case: APERTURE_VIDMEM */
test_mem->aperture = APERTURE_VIDMEM;
ret_ap_mask = nvgpu_aperture_mask(g, test_mem, sysmem_mask,
@@ -217,6 +220,7 @@ static int test_nvgpu_aperture_mask(struct unit_module *m,
if (ret_ap_mask != vidmem_mask) {
unit_return_fail(m, "Vidmem mask returned incorrect\n");
}
#endif
/*
* NVGPU_MM_HONORS_APERTURE enabled
@@ -262,6 +266,7 @@ static int test_nvgpu_aperture_mask(struct unit_module *m,
*/
nvgpu_set_enabled(g, NVGPU_MM_HONORS_APERTURE, false);
#ifdef CONFIG_NVGPU_DGPU
/* Case: APERTURE_SYSMEM */
test_mem->aperture = APERTURE_SYSMEM;
ret_ap_mask = nvgpu_aperture_mask(g, test_mem, sysmem_mask,
@@ -279,6 +284,7 @@ static int test_nvgpu_aperture_mask(struct unit_module *m,
unit_return_fail(m, "MM_HONORS disabled: "
"Incorrect mask returned for sysmem_coh\n");
}
#endif
/* Case: APERTURE_INVALID */
test_mem->aperture = APERTURE_INVALID;
@@ -773,8 +779,9 @@ struct unit_module_test nvgpu_mem_tests[] = {
* Tests covering VIDMEM branches
*/
UNIT_TEST(nvgpu_aperture_mask, test_nvgpu_aperture_mask, NULL, 0),
#ifdef CONFIG_NVGPU_DGPU
UNIT_TEST(nvgpu_mem_vidmem, test_nvgpu_mem_vidmem, NULL, 0),
#endif
/*
* Free test should be executed at the end to free allocated memory.
* As nvgpu_mem doesn't not have an explicit free function for sysmem,

5
userspace/units/pramin/nvgpu-pramin.c
View File

@@ -43,6 +43,8 @@
#include <os/linux/driver_common.h>
#ifdef CONFIG_NVGPU_DGPU
static u32 *rand_test_data;
static u32 *vidmem;
@@ -497,13 +499,16 @@ static int test_pramin_nvgpu_dying(struct unit_module *m, struct gk20a *g,
nvgpu_set_enabled(g, NVGPU_DRIVER_IS_DYING, false);
return UNIT_SUCCESS;
}
#endif
struct unit_module_test pramin_tests[] = {
#ifdef CONFIG_NVGPU_DGPU
UNIT_TEST(nvgpu_pramin_rd_n_1_sgl, test_pramin_rd_n_single, NULL, 0),
UNIT_TEST(nvgpu_pramin_wr_n_3_sgl, test_pramin_wr_n_multi, NULL, 0),
UNIT_TEST(nvgpu_pramin_memset, test_pramin_memset, NULL, 0),
UNIT_TEST(nvgpu_pramin_dying, test_pramin_nvgpu_dying, NULL, 0),
UNIT_TEST(nvgpu_pramin_free_test_env, free_test_env, NULL, 0),
#endif
};
UNIT_MODULE(pramin, pramin_tests, UNIT_PRIO_NVGPU_TEST);