From a20739c1f6d2390cf645cb665ad8babc47eba8a1 Mon Sep 17 00:00:00 2001 From: Vinod G Date: Mon, 5 Aug 2019 17:30:25 -0700 Subject: [PATCH] gpu: nvgpu: misra error in gr unit Fix MISRA violation for rule 8.6 in ecc and ctx gr units. misra_c_2012_rule_8_6_violation:function is declared but never defined Jira NVGPU-3854 Change-Id: Ia3e3f6ab6d2c33d31a3518fe3fbd033d403cbb7e Signed-off-by: Vinod G Reviewed-on: https://git-master.nvidia.com/r/2168765 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Philip Elcan Reviewed-by: Alex Waterman GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/hal/gr/ecc/ecc_gv11b.h | 3 +++ drivers/gpu/nvgpu/include/nvgpu/gr/ctx.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/nvgpu/hal/gr/ecc/ecc_gv11b.h b/drivers/gpu/nvgpu/hal/gr/ecc/ecc_gv11b.h index 3c868cdec..4e03e2051 100644 --- a/drivers/gpu/nvgpu/hal/gr/ecc/ecc_gv11b.h +++ b/drivers/gpu/nvgpu/hal/gr/ecc/ecc_gv11b.h @@ -32,6 +32,8 @@ struct nvgpu_hw_err_inject_info_desc; void gv11b_ecc_detect_enabled_units(struct gk20a *g); int gv11b_ecc_init(struct gk20a *g); + +#ifdef CONFIG_NVGPU_INJECT_HWERR int gv11b_gr_intr_inject_fecs_ecc_error(struct gk20a *g, struct nvgpu_hw_err_inject_info *err, u32 error_info); struct nvgpu_hw_err_inject_info_desc * @@ -52,5 +54,6 @@ int gv11b_gr_intr_inject_gcc_ecc_error(struct gk20a *g, struct nvgpu_hw_err_inject_info *err, u32 error_info); struct nvgpu_hw_err_inject_info_desc * gv11b_gr_intr_get_gcc_err_desc(struct gk20a *g); +#endif /* CONFIG_NVGPU_INJECT_HWERR */ #endif /* NVGPU_ECC_GV11B_H */ diff --git a/drivers/gpu/nvgpu/include/nvgpu/gr/ctx.h b/drivers/gpu/nvgpu/include/nvgpu/gr/ctx.h index 60eab09b7..08fcf07b6 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gr/ctx.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gr/ctx.h @@ -179,6 +179,7 @@ void nvgpu_gr_ctx_set_tsgid(struct nvgpu_gr_ctx *gr_ctx, u32 tsgid); u32 nvgpu_gr_ctx_get_tsgid(struct nvgpu_gr_ctx *gr_ctx); +#ifdef CONFIG_NVGPU_CILP bool nvgpu_gr_ctx_get_cilp_preempt_pending(struct nvgpu_gr_ctx *gr_ctx); void nvgpu_gr_ctx_set_cilp_preempt_pending(struct nvgpu_gr_ctx *gr_ctx, @@ -186,6 +187,7 @@ void nvgpu_gr_ctx_set_cilp_preempt_pending(struct nvgpu_gr_ctx *gr_ctx, bool nvgpu_gr_ctx_desc_force_preemption_cilp( struct nvgpu_gr_ctx_desc *gr_ctx_desc); +#endif /* CONFIG_NVGPU_CILP */ #ifdef CONFIG_NVGPU_GRAPHICS int nvgpu_gr_ctx_alloc_ctxsw_buffers(struct gk20a *g,