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gpu: nvgpu: move no_of_sm to common.gr.config

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1. Move no_of_sm from gr to common.gr.config
2. Add nvgpu_gr_config_get_no_of_sm() API in gr.config
to fetch no_of_sm.

JIRA NVGPU-1884

Change-Id: I3c6c20a12cd7f9939a349a409932195f17392943
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2073583
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Nitin Kumbhar
2019-03-15 13:19:42 +05:30
committed by mobile promotions
parent 03e137b552
commit a2314ee780
15 changed files with 61 additions and 36 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
drivers/gpu/nvgpu/common/fifo/tsg.c
View File

@@ -29,6 +29,7 @@
#include <nvgpu/tsg.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/error_notifier.h>
#include <nvgpu/gr/config.h>
#include <nvgpu/gr/ctx.h>
#include <nvgpu/runlist.h>
@@ -562,18 +563,18 @@ static struct tsg_gk20a *gk20a_tsg_acquire_unused_tsg(struct fifo_gk20a *f)
int gk20a_tsg_open_common(struct gk20a *g, struct tsg_gk20a *tsg)
{
u32 no_of_sm = nvgpu_gr_config_get_no_of_sm(g->gr.config);
int err;
/* we need to allocate this after g->ops.gr.init_fs_state() since
* we initialize gr->no_of_sm in this function
* we initialize gr.config->no_of_sm in this function
*/
if (g->gr.no_of_sm == 0U) {
nvgpu_err(g, "no_of_sm %d not set, failed allocation",
g->gr.no_of_sm);
if (no_of_sm == 0U) {
nvgpu_err(g, "no_of_sm %d not set, failed allocation", no_of_sm);
return -EINVAL;
}
err = gk20a_tsg_alloc_sm_error_states_mem(g, tsg, g->gr.no_of_sm);
err = gk20a_tsg_alloc_sm_error_states_mem(g, tsg, no_of_sm);
if (err != 0) {
return err;
}

5
drivers/gpu/nvgpu/common/gr/config/gr_config.c
View File

@@ -542,3 +542,8 @@ u32 nvgpu_gr_config_get_gpc_mask(struct nvgpu_gr_config *config)
{
return config->gpc_mask;
}
u32 nvgpu_gr_config_get_no_of_sm(struct nvgpu_gr_config *config)
{
return config->no_of_sm;
}

5
drivers/gpu/nvgpu/common/gr/gr.c
View File

@@ -108,12 +108,13 @@ int nvgpu_gr_init_fs_state(struct gk20a *g)
}
/* Is table empty ? */
if (g->gr.no_of_sm == 0U) {
if (nvgpu_gr_config_get_no_of_sm(gr_config) == 0U) {
return -EINVAL;
}
}
for (sm_id = 0; sm_id < g->gr.no_of_sm; sm_id++) {
for (sm_id = 0; sm_id < nvgpu_gr_config_get_no_of_sm(gr_config);
sm_id++) {
tpc_index = g->gr.sm_to_cluster[sm_id].tpc_index;
gpc_index = g->gr.sm_to_cluster[sm_id].gpc_index;

8
drivers/gpu/nvgpu/common/vgpu/gr/gr_vgpu.c
View File

@@ -1061,10 +1061,10 @@ void vgpu_gr_handle_sm_esr_event(struct gk20a *g,
{
struct nvgpu_tsg_sm_error_state *sm_error_states;
struct tsg_gk20a *tsg;
u32 no_of_sm = nvgpu_gr_config_get_no_of_sm(g->gr.config);
if (info->sm_id >= g->gr.no_of_sm) {
nvgpu_err(g, "invalid smd_id %d / %d",
info->sm_id, g->gr.no_of_sm);
if (info->sm_id >= no_of_sm) {
nvgpu_err(g, "invalid smd_id %d / %d", info->sm_id, no_of_sm);
return;
}
@@ -1136,7 +1136,7 @@ int vgpu_gr_init_sm_id_table(struct gk20a *g)
return -EINVAL;
}
gr->no_of_sm = p->num_sm;
gr->config->no_of_sm = p->num_sm;
for (sm_id = 0; sm_id < p->num_sm; sm_id++, entry++) {
sm_info = &gr->sm_to_cluster[sm_id];
sm_info->tpc_index = entry->tpc_index;