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gpu: nvgpu: modify alloc_as ioctl to accept mem size

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- Modify NVGPU_GPU_IOCTL_ALLOC_AS and struct nvgpu_alloc_as_args to
accept start address and size of user memory. This allows configurable
address space allocation.
- Modify gk20a_as_alloc_share() and gk20a_vm_alloc_share() to receive
va_range_start and va_range_end values.
- gk20a_vm_alloc_share() initializes vm with low_hole = va_range_start,
and user vma size = (va_range_end - va_range_start).
- Modify nvgpu_as_alloc_space_args and nvgpu_as_free_space_args to
accept 64 bit number of pages.

Bug 2043269
JIRA NVGPU-5302

Change-Id: I243995adf5b7e0e84d6b36abe3b35a5ccabd7a37
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2385496
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Sami Kiminki <skiminki@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2020-08-13 10:31:19 -07:00
committed by Alex Waterman
parent 8303e93a60
commit a252cc244a
10 changed files with 134 additions and 37 deletions
Download Patch File Download Diff File Expand all files Collapse all files

17
include/uapi/linux/nvgpu.h
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@@ -392,7 +392,7 @@ struct nvgpu_gpu_mark_compressible_write_args {
};
struct nvgpu_alloc_as_args {
__u32 big_page_size;
__u32 big_page_size; /* zero for no big pages for this VA */
__s32 as_fd;
/*
@@ -409,8 +409,12 @@ struct nvgpu_alloc_as_args {
#define NVGPU_GPU_IOCTL_ALLOC_AS_FLAGS_USERSPACE_MANAGED (1 << 0)
#define NVGPU_GPU_IOCTL_ALLOC_AS_FLAGS_UNIFIED_VA (1 << 1)
__u32 flags;
__u32 reserved; /* must be zero */
__u32 reserved; /* must be zero */
__u64 va_range_start; /* in: starting VA (aligned by PDE) */
__u64 va_range_end; /* in: ending VA (aligned by PDE) */
__u64 va_range_split; /* in: small/big page split (aligned by PDE,
* must be zero if UNIFIED_VA is set) */
__u32 padding[6];
};
struct nvgpu_gpu_open_tsg_args {
@@ -2037,14 +2041,14 @@ struct nvgpu32_as_alloc_space_args {
};
struct nvgpu_as_alloc_space_args {
__u32 pages; /* in, pages */
__u64 pages; /* in, pages */
__u32 page_size; /* in, bytes */
__u32 flags; /* in */
__u32 padding; /* in */
union {
__u64 offset; /* inout, byte address valid iff _FIXED_OFFSET */
__u64 align; /* in, alignment multiple (0:={1 or n/a}) */
} o_a;
__u32 padding[2]; /* in */
};
/*
@@ -2055,8 +2059,9 @@ struct nvgpu_as_alloc_space_args {
*/
struct nvgpu_as_free_space_args {
__u64 offset; /* in, byte address */
__u32 pages; /* in, pages */
__u64 pages; /* in, pages */
__u32 page_size; /* in, bytes */
__u32 padding[3];
};
/*