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gpu: nvgpu: fix cert arr37 error in gr unit

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Fix CERT ARR37-C violations in gr unit
cert_arr37_c_violation: Performing pointer arithmetic in expression.

Make the pointer operand point to an array using index 0.

Jira NVGPU-3854

Change-Id: I11f1d4a3e74f7711f1e3b479785b1dbcc20fee75
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2169668
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vinod G
2019-08-06 15:42:04 -07:00
committed by mobile promotions
parent 88ab1b389c
commit a2689970dc
1 changed files with 3 additions and 2 deletions
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5
drivers/gpu/nvgpu/os/posix/bitmap.c
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@@ -73,6 +73,7 @@ static unsigned long nvgpu_posix_find_next_bit(const unsigned long *addr,
unsigned long idx, idx_max;
unsigned long w;
unsigned long start_mask;
const unsigned long *base_addr = (const unsigned long *)&addr[0];
/*
* We make a mask we can XOR into the word so that we can invert the
@@ -96,7 +97,7 @@ static unsigned long nvgpu_posix_find_next_bit(const unsigned long *addr,
start_mask = ~0UL << (start & (BITS_PER_LONG - 1UL));
idx = start / BITS_PER_LONG;
w = (addr[idx] ^ invert_mask) & start_mask;
w = (base_addr[idx] ^ invert_mask) & start_mask;
start = round_up(start, BITS_PER_LONG);
@@ -114,7 +115,7 @@ static unsigned long nvgpu_posix_find_next_bit(const unsigned long *addr,
start = nvgpu_safe_add_u64(start, BITS_PER_LONG);
w = addr[idx] ^ invert_mask;
w = base_addr[idx] ^ invert_mask;
}
return min(n, (nvgpu_safe_add_u64(((nvgpu_ffs(w)) - 1UL),