From a3c42365743bf826b90ded9719b1bff0dd8fc516 Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Wed, 26 May 2021 19:25:57 -0700 Subject: [PATCH] gpu: nvgpu: profiler: create bind/unbind hals - created gops_profiler - added HALs for bind/unbind hwpm/hwpm_streamout/smpc - it helps enable b0cc on vgpu Jira GVSCI-10351 Signed-off-by: Richard Zhao Change-Id: I9fd30b134d54a92d1ce8108172aa77237c702bc0 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2537682 Reviewed-by: svcacv Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-mobile-cert Reviewed-by: svc_kernel_abi Reviewed-by: Deepak Nibade Reviewed-by: mobile promotions GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/profiler/profiler.c | 24 +++++++------- drivers/gpu/nvgpu/hal/init/hal_gv11b.c | 13 ++++++++ drivers/gpu/nvgpu/hal/init/hal_tu104.c | 13 ++++++++ .../gpu/nvgpu/include/nvgpu/gops/profiler.h | 32 ++++++++++++++++++- drivers/gpu/nvgpu/include/nvgpu/gpu_ops.h | 1 + drivers/gpu/nvgpu/include/nvgpu/profiler.h | 28 ++++++++++++++++ 6 files changed, 98 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/nvgpu/common/profiler/profiler.c b/drivers/gpu/nvgpu/common/profiler/profiler.c index 45fb1436e..41f407a91 100644 --- a/drivers/gpu/nvgpu/common/profiler/profiler.c +++ b/drivers/gpu/nvgpu/common/profiler/profiler.c @@ -306,7 +306,7 @@ static bool nvgpu_profiler_is_context_resource( prof->ctxsw[pm_resource]; } -static int nvgpu_profiler_bind_smpc(struct gk20a *g, +int nvgpu_profiler_bind_smpc(struct gk20a *g, u32 gr_instance_id, bool is_ctxsw, struct nvgpu_tsg *tsg) @@ -338,7 +338,7 @@ done: return err; } -static int nvgpu_profiler_unbind_smpc(struct gk20a *g, bool is_ctxsw, +int nvgpu_profiler_unbind_smpc(struct gk20a *g, bool is_ctxsw, struct nvgpu_tsg *tsg) { int err; @@ -383,14 +383,14 @@ static int nvgpu_profiler_bind_hwpm_common(struct gk20a *g, u32 gr_instance_id, return err; } -static int nvgpu_profiler_bind_hwpm(struct gk20a *g, u32 gr_instance_id, +int nvgpu_profiler_bind_hwpm(struct gk20a *g, u32 gr_instance_id, bool is_ctxsw, struct nvgpu_tsg *tsg) { return nvgpu_profiler_bind_hwpm_common(g, gr_instance_id, is_ctxsw, tsg, false); } -static int nvgpu_profiler_unbind_hwpm(struct gk20a *g, u32 gr_instance_id, +int nvgpu_profiler_unbind_hwpm(struct gk20a *g, u32 gr_instance_id, bool is_ctxsw, struct nvgpu_tsg *tsg) { int err = 0; @@ -571,7 +571,7 @@ static int nvgpu_profiler_quiesce_hwpm_streamout(struct gk20a *g, } } -static int nvgpu_profiler_bind_hwpm_streamout(struct gk20a *g, +int nvgpu_profiler_bind_hwpm_streamout(struct gk20a *g, u32 gr_instance_id, bool is_ctxsw, struct nvgpu_tsg *tsg, @@ -596,7 +596,7 @@ static int nvgpu_profiler_bind_hwpm_streamout(struct gk20a *g, return 0; } -static int nvgpu_profiler_unbind_hwpm_streamout(struct gk20a *g, +int nvgpu_profiler_unbind_hwpm_streamout(struct gk20a *g, u32 gr_instance_id, bool is_ctxsw, struct nvgpu_tsg *tsg, @@ -665,7 +665,7 @@ int nvgpu_profiler_bind_pm_resources(struct nvgpu_profiler_object *prof) is_ctxsw = nvgpu_profiler_is_context_resource(prof, NVGPU_PROFILER_PM_RESOURCE_TYPE_HWPM_LEGACY); if (prof->reserved[NVGPU_PROFILER_PM_RESOURCE_TYPE_PMA_STREAM]) { - err = nvgpu_profiler_bind_hwpm_streamout(g, + err = g->ops.profiler.bind_hwpm_streamout(g, gr_instance_id, is_ctxsw, prof->tsg, @@ -683,7 +683,7 @@ int nvgpu_profiler_bind_pm_resources(struct nvgpu_profiler_object *prof) "HWPM streamout bound with profiler handle %u", prof->prof_handle); } else { - err = nvgpu_profiler_bind_hwpm(prof->g, gr_instance_id, + err = g->ops.profiler.bind_hwpm(prof->g, gr_instance_id, is_ctxsw, prof->tsg); if (err != 0) { nvgpu_err(g, @@ -701,7 +701,7 @@ int nvgpu_profiler_bind_pm_resources(struct nvgpu_profiler_object *prof) if (prof->reserved[NVGPU_PROFILER_PM_RESOURCE_TYPE_SMPC]) { is_ctxsw = nvgpu_profiler_is_context_resource(prof, NVGPU_PROFILER_PM_RESOURCE_TYPE_SMPC); - err = nvgpu_profiler_bind_smpc(g, gr_instance_id, + err = g->ops.profiler.bind_smpc(g, gr_instance_id, is_ctxsw, prof->tsg); if (err) { nvgpu_err(g, "failed to bind SMPC with profiler handle %u", @@ -758,7 +758,7 @@ int nvgpu_profiler_unbind_pm_resources(struct nvgpu_profiler_object *prof) is_ctxsw = nvgpu_profiler_is_context_resource(prof, NVGPU_PROFILER_PM_RESOURCE_TYPE_HWPM_LEGACY); if (prof->reserved[NVGPU_PROFILER_PM_RESOURCE_TYPE_PMA_STREAM]) { - err = nvgpu_profiler_unbind_hwpm_streamout(g, + err = g->ops.profiler.unbind_hwpm_streamout(g, gr_instance_id, is_ctxsw, prof->tsg, @@ -775,7 +775,7 @@ int nvgpu_profiler_unbind_pm_resources(struct nvgpu_profiler_object *prof) "HWPM streamout unbound from profiler handle %u", prof->prof_handle); } else { - err = nvgpu_profiler_unbind_hwpm(g, gr_instance_id, + err = g->ops.profiler.unbind_hwpm(g, gr_instance_id, is_ctxsw, prof->tsg); if (err) { nvgpu_err(g, @@ -793,7 +793,7 @@ int nvgpu_profiler_unbind_pm_resources(struct nvgpu_profiler_object *prof) if (prof->reserved[NVGPU_PROFILER_PM_RESOURCE_TYPE_SMPC]) { is_ctxsw = nvgpu_profiler_is_context_resource(prof, NVGPU_PROFILER_PM_RESOURCE_TYPE_SMPC); - err = nvgpu_profiler_unbind_smpc(g, is_ctxsw, prof->tsg); + err = g->ops.profiler.unbind_smpc(g, is_ctxsw, prof->tsg); if (err) { nvgpu_err(g, "failed to unbind SMPC from profiler handle %u", diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c index 86c8398cc..35a5013a2 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c @@ -43,6 +43,7 @@ #ifdef CONFIG_NVGPU_LS_PMU #include #endif +#include #include "hal/mm/mm_gp10b.h" #include "hal/mm/mm_gv11b.h" @@ -1298,6 +1299,17 @@ static const struct gops_pm_reservation gv11b_ops_pm_reservation = { }; #endif +#ifdef CONFIG_NVGPU_PROFILER +static const struct gops_profiler gv11b_ops_profiler = { + .bind_hwpm = nvgpu_profiler_bind_hwpm, + .unbind_hwpm = nvgpu_profiler_unbind_hwpm, + .bind_hwpm_streamout = nvgpu_profiler_bind_hwpm_streamout, + .unbind_hwpm_streamout = nvgpu_profiler_unbind_hwpm_streamout, + .bind_smpc = nvgpu_profiler_bind_smpc, + .unbind_smpc = nvgpu_profiler_unbind_smpc, +}; +#endif + static const struct gops_bus gv11b_ops_bus = { .init_hw = gk20a_bus_init_hw, .isr = gk20a_bus_isr, @@ -1511,6 +1523,7 @@ int gv11b_init_hal(struct gk20a *g) #endif #ifdef CONFIG_NVGPU_PROFILER gops->pm_reservation = gv11b_ops_pm_reservation; + gops->profiler = gv11b_ops_profiler; #endif gops->bus = gv11b_ops_bus; gops->ptimer = gv11b_ops_ptimer; diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c index 197a61950..4abac2e0d 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c +++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c @@ -249,6 +249,7 @@ #include #include #include +#include #include @@ -1372,6 +1373,17 @@ static const struct gops_pm_reservation tu104_ops_pm_reservation = { }; #endif +#ifdef CONFIG_NVGPU_PROFILER +static const struct gops_profiler tu104_ops_profiler = { + .bind_hwpm = nvgpu_profiler_bind_hwpm, + .unbind_hwpm = nvgpu_profiler_unbind_hwpm, + .bind_hwpm_streamout = nvgpu_profiler_bind_hwpm_streamout, + .unbind_hwpm_streamout = nvgpu_profiler_unbind_hwpm_streamout, + .bind_smpc = nvgpu_profiler_bind_smpc, + .unbind_smpc = nvgpu_profiler_unbind_smpc, +}; +#endif + #ifdef CONFIG_NVGPU_LS_PMU static const struct gops_bus tu104_ops_bus = { .init_hw = tu104_bus_init_hw, @@ -1704,6 +1716,7 @@ int tu104_init_hal(struct gk20a *g) #endif #ifdef CONFIG_NVGPU_PROFILER gops->pm_reservation = tu104_ops_pm_reservation; + gops->profiler = tu104_ops_profiler; #endif gops->bus = tu104_ops_bus; gops->ptimer = tu104_ops_ptimer; diff --git a/drivers/gpu/nvgpu/include/nvgpu/gops/profiler.h b/drivers/gpu/nvgpu/include/nvgpu/gops/profiler.h index 659698506..4ed0a9e5b 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gops/profiler.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gops/profiler.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -33,6 +33,36 @@ struct gops_pm_reservation { u32 vmid); void (*release_all_per_vmid)(struct gk20a *g, u32 vmid); }; +struct gops_profiler { + int (*bind_hwpm)(struct gk20a *g, + u32 gr_instance_id, + bool is_ctxsw, + struct nvgpu_tsg *tsg); + int (*unbind_hwpm)(struct gk20a *g, + u32 gr_instance_id, + bool is_ctxsw, + struct nvgpu_tsg *tsg); + int (*bind_hwpm_streamout)(struct gk20a *g, + u32 gr_instance_id, + bool is_ctxsw, + struct nvgpu_tsg *tsg, + u64 pma_buffer_va, + u32 pma_buffer_size, + u64 pma_bytes_available_buffer_va); + int (*unbind_hwpm_streamout)(struct gk20a *g, + u32 gr_instance_id, + bool is_ctxsw, + struct nvgpu_tsg *tsg, + void *pma_bytes_available_buffer_cpuva, + bool smpc_reserved); + int (*bind_smpc)(struct gk20a *g, + u32 gr_instance_id, + bool is_ctxsw, + struct nvgpu_tsg *tsg); + int (*unbind_smpc)(struct gk20a *g, + bool is_ctxsw, + struct nvgpu_tsg *tsg); +}; #endif #endif /* NVGPU_GOPS_PROFILER_H */ diff --git a/drivers/gpu/nvgpu/include/nvgpu/gpu_ops.h b/drivers/gpu/nvgpu/include/nvgpu/gpu_ops.h index 998ee069f..3e7c7005b 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gpu_ops.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gpu_ops.h @@ -166,6 +166,7 @@ struct gpu_ops { #endif #ifdef CONFIG_NVGPU_PROFILER struct gops_pm_reservation pm_reservation; + struct gops_profiler profiler; #endif /** Ops to get litter value corresponding to litter define. */ diff --git a/drivers/gpu/nvgpu/include/nvgpu/profiler.h b/drivers/gpu/nvgpu/include/nvgpu/profiler.h index cd01b7a3b..de9bc6886 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/profiler.h +++ b/drivers/gpu/nvgpu/include/nvgpu/profiler.h @@ -147,6 +147,34 @@ int nvgpu_profiler_pm_resource_reserve(struct nvgpu_profiler_object *prof, int nvgpu_profiler_pm_resource_release(struct nvgpu_profiler_object *prof, enum nvgpu_profiler_pm_resource_type pm_resource); +int nvgpu_profiler_bind_hwpm(struct gk20a *g, + u32 gr_instance_id, + bool is_ctxsw, + struct nvgpu_tsg *tsg); +int nvgpu_profiler_unbind_hwpm(struct gk20a *g, + u32 gr_instance_id, + bool is_ctxsw, + struct nvgpu_tsg *tsg); +int nvgpu_profiler_bind_hwpm_streamout(struct gk20a *g, + u32 gr_instance_id, + bool is_ctxsw, + struct nvgpu_tsg *tsg, + u64 pma_buffer_va, + u32 pma_buffer_size, + u64 pma_bytes_available_buffer_va); +int nvgpu_profiler_unbind_hwpm_streamout(struct gk20a *g, + u32 gr_instance_id, + bool is_ctxsw, + struct nvgpu_tsg *tsg, + void *pma_bytes_available_buffer_cpuva, + bool smpc_reserved); +int nvgpu_profiler_bind_smpc(struct gk20a *g, + u32 gr_instance_id, + bool is_ctxsw, + struct nvgpu_tsg *tsg); +int nvgpu_profiler_unbind_smpc(struct gk20a *g, bool is_ctxsw, + struct nvgpu_tsg *tsg); + int nvgpu_profiler_bind_pm_resources(struct nvgpu_profiler_object *prof); int nvgpu_profiler_unbind_pm_resources(struct nvgpu_profiler_object *prof);