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gpu: nvgpu: ga10b: Use active ltcs count for cbc init

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This patch fixes a bug in the cbc initialization code for ga10b,
where it was erroneously assumed that a fixed ltc count of only one
should be used for historical reasons. For volta and later, the full
ltc count should be used in cbc-related computation.
Ensure
- CBC base address is 64K aligned
- CBC start address lies within CBC allocated memory

Check CBC is marked safe only for silicon platform.

Bug 3353418

Change-Id: I5edee2a78dc9e8c149e111a9f088a57e0154f5c2
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2585778
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2021-08-25 21:58:21 -07:00
committed by mobile promotions
parent cc7b048641
commit a3e2283cf2
13 changed files with 113 additions and 67 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/gpu/nvgpu/include/nvgpu/gops/cbc.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -27,7 +27,6 @@ struct gops_cbc {
int (*cbc_init_support)(struct gk20a *g);
void (*cbc_remove_support)(struct gk20a *g);
void (*init)(struct gk20a *g, struct nvgpu_cbc *cbc);
u64 (*get_base_divisor)(struct gk20a *g);
int (*alloc_comptags)(struct gk20a *g,
struct nvgpu_cbc *cbc);
int (*ctrl)(struct gk20a *g, enum nvgpu_cbc_op op,

12
drivers/gpu/nvgpu/include/nvgpu/gops/fb.h
View File

@@ -440,6 +440,18 @@ struct gops_fb {
(struct gk20a *g);
#ifdef CONFIG_NVGPU_COMPRESSION
void (*cbc_configure)(struct gk20a *g, struct nvgpu_cbc *cbc);
/**
* @brief Get cbc base and top alignment specs.
*
* @param g [in] Pointer to GPU driver struct.
*
* The function calculates and returns required CBC base and top
* alignment values.
*
* @return None.
*/
void (*cbc_get_alignment)(struct gk20a *g,
u64 *base_divisor, u64 *top_divisor);
bool (*set_use_full_comp_tag_line)(struct gk20a *g);
/*

4
drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_fb_tu104.h
View File

@@ -687,13 +687,13 @@
#define fb_mmu_num_active_ltcs_count_f(v) ((U32(v) & 0x1fU) << 0U)
#define fb_mmu_num_active_ltcs_count_v(r) (((r) >> 0U) & 0x1fU)
#define fb_mmu_cbc_base_r() (0x00100ec4U)
#define fb_mmu_cbc_base_alignment_shift_v() (0x0000000bU)
#define fb_mmu_cbc_base_address_f(v) ((U32(v) & 0x3ffffffU) << 0U)
#define fb_mmu_cbc_base_address_v(r) (((r) >> 0U) & 0x3ffffffU)
#define fb_mmu_cbc_base_address_alignment_shift_v() (0x0000000bU)
#define fb_mmu_cbc_top_r() (0x00100ec8U)
#define fb_mmu_cbc_top_alignment_shift_v() (0x0000000bU)
#define fb_mmu_cbc_top_size_f(v) ((U32(v) & 0x7fffU) << 0U)
#define fb_mmu_cbc_top_size_v(r) (((r) >> 0U) & 0x7fffU)
#define fb_mmu_cbc_top_size_alignment_shift_v() (0x0000000bU)
#define fb_mmu_cbc_max_r() (0x00100eccU)
#define fb_mmu_cbc_max_comptagline_f(v) ((U32(v) & 0xffffffU) << 0U)
#define fb_mmu_cbc_max_comptagline_m() (U32(0xffffffU) << 0U)