nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-24 10:34:43 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: add tegra_raw support

Browse Source 
* This change adds NVGPU_AS_MAP_BUFFER_FLAGS_TEGRA_RAW flag
   to control buffer format
 * Add NVGPU_SUPPORT_TEGRA_RAW enabled flag to indicate if feature
   is enabled for a given chip.
 * Update gv11b_gpu_phys_addr function to set TEGRA_RAW bit

Jira NVGPU-6640
Bug 3489827

Change-Id: I959c22bef906bb9c6dcdc8d5f5e9951ad9937a60
Signed-off-by: Sagar Kadamati <skadamati@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2545128
Reviewed-by: Martin Radev <mradev@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Seema Khowala <seemaj@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Sagar Kadamati
2021-06-15 12:11:21 +05:30
committed by mobile promotions
parent 03b1a81ab1
commit a3ed73a57c
8 changed files with 63 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/gpu/nvgpu/common/mm/gmmu/page_table.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2021, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2017-2022, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -1060,7 +1060,15 @@ u64 nvgpu_gmmu_map_locked(struct vm_gk20a *vm,
#endif
#endif
attrs.l3_alloc = ((flags & NVGPU_VM_MAP_L3_ALLOC) != 0U);
attrs.l3_alloc = ((flags & NVGPU_VM_MAP_L3_ALLOC) != 0U);
if (nvgpu_is_enabled(g, NVGPU_SUPPORT_TEGRA_RAW)) {
#ifdef CONFIG_NVGPU_TRACE
nvgpu_gmmu_dbg_v(g, &attrs,
"TEGRA_RAW format is requested");
#endif /* CONFIG_NVGPU_TRACE */
attrs.tegra_raw = ((flags & NVGPU_VM_MAP_TEGRA_RAW) != 0U);
}
#if defined(CONFIG_NVGPU_NON_FUSA)
if (nvgpu_is_errata_present(g, NVGPU_ERRATA_3288192) &&
(attrs.l3_alloc)) {