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gpu: nvgpu: add tegra_raw support

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* This change adds NVGPU_AS_MAP_BUFFER_FLAGS_TEGRA_RAW flag
   to control buffer format
 * Add NVGPU_SUPPORT_TEGRA_RAW enabled flag to indicate if feature
   is enabled for a given chip.
 * Update gv11b_gpu_phys_addr function to set TEGRA_RAW bit

Jira NVGPU-6640
Bug 3489827

Change-Id: I959c22bef906bb9c6dcdc8d5f5e9951ad9937a60
Signed-off-by: Sagar Kadamati <skadamati@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2545128
Reviewed-by: Martin Radev <mradev@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Seema Khowala <seemaj@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Sagar Kadamati
2021-06-15 12:11:21 +05:30
committed by mobile promotions
parent 03b1a81ab1
commit a3ed73a57c
8 changed files with 63 additions and 24 deletions
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19
include/uapi/linux/nvgpu-as.h
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -102,14 +102,15 @@ struct nvgpu_as_bind_channel_args {
* chosen will be returned back to the caller in the 'page_size' parameter in
* that case.
*/
#define NVGPU_AS_MAP_BUFFER_FLAGS_FIXED_OFFSET (1 << 0)
#define NVGPU_AS_MAP_BUFFER_FLAGS_CACHEABLE (1 << 2)
#define NVGPU_AS_MAP_BUFFER_FLAGS_IO_COHERENT (1 << 4)
#define NVGPU_AS_MAP_BUFFER_FLAGS_UNMAPPED_PTE (1 << 5)
#define NVGPU_AS_MAP_BUFFER_FLAGS_MAPPABLE_COMPBITS (1 << 6)
#define NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC (1 << 7)
#define NVGPU_AS_MAP_BUFFER_FLAGS_DIRECT_KIND_CTRL (1 << 8)
#define NVGPU_AS_MAP_BUFFER_FLAGS_PLATFORM_ATOMIC (1 << 9)
#define NVGPU_AS_MAP_BUFFER_FLAGS_FIXED_OFFSET (1 << 0)
#define NVGPU_AS_MAP_BUFFER_FLAGS_CACHEABLE (1 << 2)
#define NVGPU_AS_MAP_BUFFER_FLAGS_IO_COHERENT (1 << 4)
#define NVGPU_AS_MAP_BUFFER_FLAGS_UNMAPPED_PTE (1 << 5)
#define NVGPU_AS_MAP_BUFFER_FLAGS_MAPPABLE_COMPBITS (1 << 6)
#define NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC (1 << 7)
#define NVGPU_AS_MAP_BUFFER_FLAGS_DIRECT_KIND_CTRL (1 << 8)
#define NVGPU_AS_MAP_BUFFER_FLAGS_PLATFORM_ATOMIC (1 << 9)
#define NVGPU_AS_MAP_BUFFER_FLAGS_TEGRA_RAW (1 << 12)
#define NVGPU_AS_MAP_BUFFER_FLAGS_ACCESS_BITMASK_OFFSET 10U
#define NVGPU_AS_MAP_BUFFER_FLAGS_ACCESS_BITMASK_SIZE 2U