diff --git a/drivers/gpu/nvgpu/common/init/nvgpu_init.c b/drivers/gpu/nvgpu/common/init/nvgpu_init.c
index 92603649f..3bbf60ee6 100644
--- a/drivers/gpu/nvgpu/common/init/nvgpu_init.c
+++ b/drivers/gpu/nvgpu/common/init/nvgpu_init.c
@@ -637,13 +637,12 @@ static int nvgpu_init_slcg_acb_load_gating_prod(struct gk20a *g)
 	return 0;
 }
 
-#ifdef CONFIG_TEGRA_HV_MANAGER
 static int nvgpu_ipa_pa_rwsem_init(struct gk20a *g)
 {
 	nvgpu_rwsem_init(&(g->ipa_pa_cache.ipa_pa_rw_lock));
 	return 0;
 }
-#endif
+
 static int nvgpu_init_interrupt_setup(struct gk20a *g)
 {
 	/**
@@ -697,9 +696,7 @@ static int nvgpu_early_init(struct gk20a *g)
 		 * prior to enabling interrupts for corresponding units.
 		 */
 		NVGPU_INIT_TABLE_ENTRY(g->ops.ecc.ecc_init_support, NO_FLAG),
-#ifdef CONFIG_TEGRA_HV_MANAGER
 		NVGPU_INIT_TABLE_ENTRY(&nvgpu_ipa_pa_rwsem_init, NO_FLAG),
-#endif
 		NVGPU_INIT_TABLE_ENTRY(&nvgpu_device_init, NO_FLAG),
 #ifdef CONFIG_NVGPU_DGPU
 		NVGPU_INIT_TABLE_ENTRY(g->ops.bios.bios_sw_init, NO_FLAG),
diff --git a/drivers/gpu/nvgpu/common/mm/ipa_pa_cache.c b/drivers/gpu/nvgpu/common/mm/ipa_pa_cache.c
index f81c28325..64614e64e 100644
--- a/drivers/gpu/nvgpu/common/mm/ipa_pa_cache.c
+++ b/drivers/gpu/nvgpu/common/mm/ipa_pa_cache.c
@@ -19,11 +19,9 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifdef CONFIG_TEGRA_HV_MANAGER
 #include <nvgpu/gk20a.h>
 #include <nvgpu/timers.h>
 #include <nvgpu/ipa_pa_cache.h>
-#include <soc/tegra/virt/syscalls.h>
 
 static u64 nvgpu_ipa_to_pa_cache_lookup(struct gk20a *g, u64 ipa,
 				u64 *pa_len)
@@ -65,7 +63,7 @@ u64 nvgpu_ipa_to_pa_cache_lookup_locked(struct gk20a *g, u64 ipa,
 }
 
 void nvgpu_ipa_to_pa_add_to_cache(struct gk20a *g, u64 ipa, u64 pa,
-				struct hyp_ipa_pa_info *info)
+				struct nvgpu_hyp_ipa_pa_info *info)
 {
 	struct nvgpu_ipa_pa_cache *ipa_cache;
 	struct nvgpu_ipa_desc *desc = NULL;
@@ -96,4 +94,3 @@ void nvgpu_ipa_to_pa_add_to_cache(struct gk20a *g, u64 ipa, u64 pa,
 	nvgpu_rwsem_up_write(&(ipa_cache->ipa_pa_rw_lock));
 
 }
-#endif
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
index adf024263..04c3e1925 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
@@ -146,9 +146,7 @@ enum nvgpu_profiler_pm_reservation_scope;
 #include <nvgpu/semaphore.h>
 #include <nvgpu/fifo.h>
 #include <nvgpu/sched.h>
-#ifdef CONFIG_TEGRA_HV_MANAGER
 #include <nvgpu/ipa_pa_cache.h>
-#endif
 #include <nvgpu/mig.h>
 
 #include <nvgpu/gpu_ops.h>
@@ -847,10 +845,9 @@ struct gk20a {
 
 	/** Pointer to struct storing CIC-RM's data */
 	struct nvgpu_cic_rm *cic_rm;
-#ifdef CONFIG_TEGRA_HV_MANAGER
+
 	/** Cache to store IPA to PA translations. */
 	struct nvgpu_ipa_pa_cache ipa_pa_cache;
-#endif
 
 	/** To enable emulate mode */
 	u32 emulate_mode;
diff --git a/drivers/gpu/nvgpu/include/nvgpu/ipa_pa_cache.h b/drivers/gpu/nvgpu/include/nvgpu/ipa_pa_cache.h
index f7d37b0b7..d8a51a5e0 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/ipa_pa_cache.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/ipa_pa_cache.h
@@ -23,10 +23,14 @@
 #ifndef NVGPU_IPAPACACHE_H
 #define NVGPU_IPAPACACHE_H
 
-#ifdef CONFIG_TEGRA_HV_MANAGER
 #include <nvgpu/rwsem.h>
 
-struct hyp_ipa_pa_info;
+struct nvgpu_hyp_ipa_pa_info {
+	u64 base;
+	u64 offset;
+	u64 size;
+};
+
 struct gk20a;
 
 #define MAX_IPA_PA_CACHE 256U
@@ -47,6 +51,5 @@ u64 nvgpu_ipa_to_pa_cache_lookup_locked(struct gk20a *g, u64 ipa,
 		u64 *pa_len);
 
 void nvgpu_ipa_to_pa_add_to_cache(struct gk20a *g, u64 ipa,
-		u64 pa, struct hyp_ipa_pa_info *info);
-#endif
+		u64 pa, struct nvgpu_hyp_ipa_pa_info *info);
 #endif /* NVGPU_IPAPACACHE_H */
diff --git a/drivers/gpu/nvgpu/os/linux/soc.c b/drivers/gpu/nvgpu/os/linux/soc.c
index 2e0dd6efd..88e5722c3 100644
--- a/drivers/gpu/nvgpu/os/linux/soc.c
+++ b/drivers/gpu/nvgpu/os/linux/soc.c
@@ -71,6 +71,7 @@ static u64 nvgpu_tegra_hv_ipa_pa(struct gk20a *g, u64 ipa, u64 *pa_len)
 	struct device *dev = dev_from_gk20a(g);
 	struct gk20a_platform *platform = gk20a_get_platform(dev);
 	struct hyp_ipa_pa_info info;
+	struct nvgpu_hyp_ipa_pa_info nvgpu_ipapainfo;
 	int err;
 	u64 pa = 0ULL;
 
@@ -100,7 +101,11 @@ static u64 nvgpu_tegra_hv_ipa_pa(struct gk20a *g, u64 ipa, u64 *pa_len)
 	}
 
 	if (pa != 0U) {
-		nvgpu_ipa_to_pa_add_to_cache(g, ipa, pa, &info);
+		nvgpu_ipapainfo.base = info.base;
+		nvgpu_ipapainfo.offset = info.offset;
+		nvgpu_ipapainfo.size = info.size;
+		nvgpu_ipa_to_pa_add_to_cache(g, ipa, pa,
+				&nvgpu_ipapainfo);
 	}
 
 	return pa;