From a5a68b2ae074cb499de234babea06ba2a333a72e Mon Sep 17 00:00:00 2001 From: Vedashree Vidwans Date: Wed, 3 Jul 2019 15:12:10 -0700 Subject: [PATCH] gpu: nvgpu: fix MISRA issues nvgpu.common.mm.mm MISRA Rule 3.1 doesn't allow nested character sequences "//" ot "/*" in a comment. This patch updates link in comment to remove "//" character sequence. Jira NVGPU-3766 Change-Id: Ie07f567b752b39868ed8f3c6c220da5f01a8d259 Signed-off-by: Vedashree Vidwans Reviewed-on: https://git-master.nvidia.com/r/2147784 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/include/nvgpu/mm.h | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/drivers/gpu/nvgpu/include/nvgpu/mm.h b/drivers/gpu/nvgpu/include/nvgpu/mm.h index 40b01d7d9..4a4170ab5 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/mm.h +++ b/drivers/gpu/nvgpu/include/nvgpu/mm.h @@ -149,16 +149,6 @@ * - nvgpu_gmmu_map() * - nvgpu_dma_alloc() * - * Requirements - * ============ - * - * I added this section to link to unit level requirements. Seems like it's - * missing from the IPP template. - * - * Requirement | Link - * ----------- | --------------------------------------------------------------------------- - * NVGPU-RQCD-45 | https://nvidia.jamacloud.com/perspective.req#/items/6434840?projectId=20460 - * * Open Items * ========== *