gpu: nvgpu: gv100: enable syncpt shim for nvlink

Get host1x node reference from c1_rp device tree node, and
enable syncpoints shim in case of nvlink.

JIRA EVLR-2441
JIRA EVLR-2585

Change-Id: Idbf1edf656557f2ed2d3bd27393c2f4d5d1ad75a
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1663360
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/common/linux/nvhost.c

@@ -258,4 +258,37 @@ u32 nvgpu_nvhost_syncpt_unit_interface_get_byte_offset(u32 syncpt_id)
 {
 	return nvhost_syncpt_unit_interface_get_byte_offset(syncpt_id);
 }
+
+int nvgpu_nvhost_syncpt_init(struct gk20a *g)
+{
+	int err = 0;
+
+	if (!g->has_syncpoints)
+		return -ENOSYS;
+
+	err = nvgpu_get_nvhost_dev(g);
+	if (err) {
+		nvgpu_err(g, "host1x device not available");
+		g->has_syncpoints = false;
+		return -ENOSYS;
+	}
+
+	err = nvgpu_nvhost_syncpt_unit_interface_get_aperture(
+			g->nvhost_dev,
+			&g->syncpt_unit_base,
+			&g->syncpt_unit_size);
+	if (err) {
+		nvgpu_err(g, "Failed to get syncpt interface");
+		g->has_syncpoints = false;
+		return -ENOSYS;
+	}
+
+	g->syncpt_size =
+			nvgpu_nvhost_syncpt_unit_interface_get_byte_offset(1);
+	nvgpu_info(g, "syncpt_unit_base %llx syncpt_unit_size %zx size %x\n",
+			g->syncpt_unit_base, g->syncpt_unit_size,
+			g->syncpt_size);
+
+	return 0;
+}
 #endif

drivers/gpu/nvgpu/common/linux/pci.c

@@ -20,6 +20,7 @@
 #include <linux/of_platform.h>
 #include <linux/of_address.h>
 
+#include <nvgpu/nvhost.h>
 #include <nvgpu/nvgpu_common.h>
 #include <nvgpu/kmem.h>
 #include <nvgpu/enabled.h>
@@ -316,6 +317,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
 	.vbios_min_version = 0x88000126,
 	.hardcode_sw_threshold = false,
 	.run_preos = true,
+	.has_syncpoints = true,
 	},
 	{ /* SKU250 */
 	/* ptimer src frequency in hz */
@@ -350,6 +352,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
 	.vbios_min_version = 0x1,
 	.hardcode_sw_threshold = false,
 	.run_preos = true,
+	.has_syncpoints = true,
 	},
 	{ /* SKU 0x1e3f */
 	/* ptimer src frequency in hz */
@@ -700,6 +703,17 @@ static int nvgpu_pci_probe(struct pci_dev *pdev,
 			nvgpu_err(g, "fatal error probing nvlink, bailing out");
 			goto err_free_irq;
 		}
+		/* Enable Semaphore SHIM on nvlink only for now. */
+		__nvgpu_set_enabled(g, NVGPU_SUPPORT_NVLINK, false);
+		g->has_syncpoints = false;
+	} else {
+		err = nvgpu_nvhost_syncpt_init(g);
+		if (err) {
+			if (err != -ENOSYS) {
+				nvgpu_err(g, "syncpt init failed");
+				goto err_free_irq;
+			}
+		}
 	}
 
 	g->mm.has_physical_mode = false;

drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c

@@ -49,37 +49,13 @@ static void gr_gv11b_remove_sysfs(struct device *dev);
 static int gv11b_tegra_probe(struct device *dev)
 {
 	struct gk20a_platform *platform = dev_get_drvdata(dev);
-#ifdef CONFIG_TEGRA_GK20A_NVHOST
-	struct gk20a *g = platform->g;
-	int err = 0;
+	int err;
 
-	if (g->has_syncpoints) {
-		err = nvgpu_get_nvhost_dev(g);
+	err = nvgpu_nvhost_syncpt_init(platform->g);
 	if (err) {
-			dev_err(dev, "host1x device not available");
+		if (err != -ENOSYS)
 			return err;
 	}
-	}
-
-	if (g->has_syncpoints) {
-		err = nvgpu_nvhost_syncpt_unit_interface_get_aperture(
-				g->nvhost_dev,
-				&g->syncpt_unit_base,
-				&g->syncpt_unit_size);
-		if (err) {
-			dev_err(dev, "Failed to get syncpt interface");
-			return -ENOSYS;
-		}
-		g->syncpt_size =
-			nvgpu_nvhost_syncpt_unit_interface_get_byte_offset(1);
-		nvgpu_info(g, "syncpt_unit_base %llx "
-				"syncpt_unit_size %zx size %x\n",
-				g->syncpt_unit_base, g->syncpt_unit_size,
-				g->syncpt_size);
-	}
-#else
-	g->has_syncpoints = false;
-#endif
 
 	err = gk20a_tegra_init_secure_alloc(platform);
 	if (err)

drivers/gpu/nvgpu/gk20a/gk20a.c

@@ -182,15 +182,11 @@ int gk20a_finalize_poweron(struct gk20a *g)
 	}
 
 	if (nvgpu_is_enabled(g, NVGPU_SUPPORT_NVLINK)) {
-		if (g->ops.nvlink.init) {
 		err = g->ops.nvlink.init(g);
 		if (err) {
 			nvgpu_err(g, "failed to init nvlink");
-				__nvgpu_set_enabled(g, NVGPU_SUPPORT_NVLINK,
-									false);
+			goto done;
 		}
-		} else
-			__nvgpu_set_enabled(g, NVGPU_SUPPORT_NVLINK, false);
 	}
 
 	if (g->ops.fb.mem_unlock) {

drivers/gpu/nvgpu/gv100/hal_gv100.c

@@ -248,6 +248,10 @@ int gv100_init_gpu_characteristics(struct gk20a *g)
 
 	__nvgpu_set_enabled(g, NVGPU_SUPPORT_TSG_SUBCONTEXTS, true);
 	__nvgpu_set_enabled(g, NVGPU_SUPPORT_GET_TEMPERATURE, true);
+	if (g->has_syncpoints) {
+		__nvgpu_set_enabled(g, NVGPU_SUPPORT_SYNCPOINT_ADDRESS, true);
+		__nvgpu_set_enabled(g, NVGPU_SUPPORT_USER_SYNCPOINT, true);
+	}
 
 	return 0;
 }

drivers/gpu/nvgpu/gv100/nvlink_gv100.c

@@ -1636,8 +1636,10 @@ int gv100_nvlink_init(struct gk20a *g)
 		return -ENODEV;
 
 	err = nvgpu_nvlink_enumerate(g);
-	if (err)
-		return err;
+	if (err) {
+		nvgpu_err(g, "failed to enumerate nvlink");
+		goto fail;
+	}
 
 	/* Set HSHUB and SG_PHY */
 	__nvgpu_set_enabled(g, NVGPU_MM_USE_PHYSICAL_SG, true);
@@ -1645,10 +1647,15 @@ int gv100_nvlink_init(struct gk20a *g)
 	err = g->ops.fb.enable_nvlink(g);
 	if (err) {
 		nvgpu_err(g, "failed switch to nvlink sysmem");
-		return err;
+		goto fail;
 	}
 
 	return err;
+
+fail:
+	__nvgpu_set_enabled(g, NVGPU_MM_USE_PHYSICAL_SG, false);
+	__nvgpu_set_enabled(g, NVGPU_SUPPORT_NVLINK, false);
+	return err;
 }
 
 /*

drivers/gpu/nvgpu/include/nvgpu/nvhost.h

@@ -89,11 +89,20 @@ int nvgpu_nvhost_syncpt_unit_interface_get_aperture(
 		struct nvgpu_nvhost_dev *nvhost_dev,
 		u64 *base, size_t *size);
 u32 nvgpu_nvhost_syncpt_unit_interface_get_byte_offset(u32 syncpt_id);
+int nvgpu_nvhost_syncpt_init(struct gk20a *g);
 #else
 static inline int nvgpu_nvhost_syncpt_unit_interface_get_aperture(
 		struct nvgpu_nvhost_dev *nvhost_dev,
-		u64 *base, size_t *size) { return -EINVAL; }
-static inline u32 nvgpu_nvhost_syncpt_unit_interface_get_byte_offset(u32 syncpt_id) {
+		u64 *base, size_t *size)
+{
+	return -EINVAL;
+}
+static inline u32 nvgpu_nvhost_syncpt_unit_interface_get_byte_offset(u32 syncpt_id)
+{
+	return 0;
+}
+static inline int nvgpu_nvhost_syncpt_init(struct gk20a *g)
+{
 	return 0;
 }
 #endif