diff --git a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c
index 93bae9212..2ba677b02 100644
--- a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c
@@ -1655,7 +1655,8 @@ int gm20b_clk_get_pll_debug_data(struct gk20a *g,
 	d->trim_sys_gpc2clk_out_reg = trim_sys_gpc2clk_out_r();
 	d->trim_sys_gpc2clk_out_val = gk20a_readl(g, trim_sys_gpc2clk_out_r());
 	d->trim_sys_gpcpll_cfg_reg = trim_sys_gpcpll_cfg_r();
-	d->trim_sys_gpcpll_dvfs2_reg = trim_gpc_bcast_gpcpll_dvfs2_r();
+	d->trim_sys_gpcpll_dvfs2_reg = trim_sys_gpcpll_dvfs2_r();
+	d->trim_bcast_gpcpll_dvfs2_reg = trim_gpc_bcast_gpcpll_dvfs2_r();
 
 	reg = gk20a_readl(g, trim_sys_gpcpll_cfg_r());
 	d->trim_sys_gpcpll_cfg_val = reg;
diff --git a/drivers/gpu/nvgpu/gm20b/clk_gm20b.h b/drivers/gpu/nvgpu/gm20b/clk_gm20b.h
index e814ac70e..c93d4ee39 100644
--- a/drivers/gpu/nvgpu/gm20b/clk_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/clk_gm20b.h
@@ -41,6 +41,7 @@ struct nvgpu_clk_pll_debug_data {
 
 	u32 trim_sys_gpcpll_cfg_reg;
 	u32 trim_sys_gpcpll_dvfs2_reg;
+	u32 trim_bcast_gpcpll_dvfs2_reg;
 
 	u32 trim_sys_gpcpll_cfg_val;
 	bool trim_sys_gpcpll_cfg_enabled;
diff --git a/drivers/gpu/nvgpu/os/linux/debug_clk_gm20b.c b/drivers/gpu/nvgpu/os/linux/debug_clk_gm20b.c
index f514d2c81..52eea83f1 100644
--- a/drivers/gpu/nvgpu/os/linux/debug_clk_gm20b.c
+++ b/drivers/gpu/nvgpu/os/linux/debug_clk_gm20b.c
@@ -108,10 +108,14 @@ static int pll_reg_raw_show(struct seq_file *s, void *data)
 
 	seq_puts(s, "GPCPLL REGISTERS:\n");
 	for (reg = d.trim_sys_gpcpll_cfg_reg;
-	     reg <= d.trim_sys_gpcpll_dvfs2_reg;
+	     reg < d.trim_sys_gpcpll_dvfs2_reg;
 	     reg += sizeof(u32))
 		seq_printf(s, "[0x%02x] = 0x%08x\n", reg, gk20a_readl(g, reg));
 
+	reg = d.trim_bcast_gpcpll_dvfs2_reg;
+	if (reg)
+		seq_printf(s, "[0x%02x] = 0x%08x\n", reg, gk20a_readl(g, reg));
+
 	seq_puts(s, "\nGPC CLK OUT REGISTERS:\n");
 
 	seq_printf(s, "[0x%02x] = 0x%08x\n", d.trim_sys_sel_vco_reg,