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gpu: nvgpu: fix MISRA 11.2 nvgpu_sgl

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MISRA rule 11.2 doesn't allow conversions of a pointer from or to an
incomplete type. These type of conversions may result in a pointer
aligned incorrectly and may further result in undefined behavior.

This patch addresses rule 11.2 violations related to pointers to and
from struct nvgpu_sgl. This patch replaces struct nvgpu_sgl pointers by
void pointers.

Jira NVGPU-3736

Change-Id: I8fd5766eacace596f2761b308bce79f22f2cb207
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2267876
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2019-12-23 16:05:45 -08:00
committed by Alex Waterman
parent 6b62e0f79a
commit a615604411
20 changed files with 68 additions and 88 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
userspace/units/mm/allocators/page_allocator/page_allocator.c
View File

@@ -390,7 +390,7 @@ static int test_page_allocator_sgt_ops(struct unit_module *m,
struct gk20a *g, void *args)
{
u64 addr;
struct nvgpu_sgl *sgl = NULL;
void *sgl = NULL;
struct nvgpu_page_alloc *alloc = NULL;
addr = na->ops->alloc(na, SZ_32K);

2
userspace/units/mm/gmmu/page_table/page_table.c
View File

@@ -265,7 +265,7 @@ static struct test_parameters test_sgt_iommu_sysmem = {
* This is used to test a corner case in __nvgpu_gmmu_do_update_page_table()
*/
static u64 nvgpu_mem_sgl_ipa_to_pa_by_half(struct gk20a *g,
struct nvgpu_sgl *sgl, u64 ipa, u64 *pa_len)
void *sgl, u64 ipa, u64 *pa_len)
{
*pa_len = test_iommu_sysmem_sgl_skip.offset_pages * SZ_4K / 2;

4
userspace/units/mm/nvgpu_mem/nvgpu_mem.c
View File

@@ -537,9 +537,9 @@ int test_nvgpu_mem_phys_ops(struct unit_module *m,
u64 ret;
struct nvgpu_gmmu_attrs *attrs = NULL;
struct nvgpu_sgt *test_sgt = test_mem->phys_sgt;
struct nvgpu_sgl *test_sgl = test_sgt->sgl;
void *test_sgl = test_sgt->sgl;
struct nvgpu_sgl *temp_sgl = test_sgt->ops->sgl_next(test_sgl);
void *temp_sgl = test_sgt->ops->sgl_next(test_sgl);
if (temp_sgl != NULL) {
unit_return_fail(m,

4
userspace/units/mm/nvgpu_sgt/nvgpu_sgt.c
View File

@@ -44,7 +44,7 @@ static u64 ops_sgl_ipa(struct gk20a *g, void *sgl)
return EXPECTED_U64;
}
static u64 ops_sgl_ipa_to_pa(struct gk20a *g, struct nvgpu_sgl *sgl,
static u64 ops_sgl_ipa_to_pa(struct gk20a *g, void *sgl,
u64 ipa, u64 *pa_len)
{
return EXPECTED_U64;
@@ -157,7 +157,7 @@ int test_nvgpu_sgt_get_next(struct unit_module *m, struct gk20a *g,
{
int ret = UNIT_SUCCESS;
struct nvgpu_sgt *sgt;
struct nvgpu_sgl *api_ptr;
void *api_ptr;
struct nvgpu_mem_sgl *sgl_ptr;
int i;
#define SGL_LEN 100