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gpu: nvgpu: Bump FB gk20a code to gm20b

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Move all code from fb_gk20a.c to fb_gm20b.c.

Change-Id: I87fbdfee76599e019564d66bf248aaffcf978498
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1801422
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Terje Bergstrom
2018-08-16 14:27:35 -07:00
committed by mobile promotions
parent 2e051a78a5
commit a6499fb9ce
14 changed files with 112 additions and 182 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/nvgpu/Makefile
View File

@@ -31,7 +31,6 @@ nvgpu-y += common/bus/bus_gk20a.o \
common/priv_ring/priv_ring_gp10b.o \
common/ptimer/ptimer.o \
common/ptimer/ptimer_gk20a.o \
common/fb/fb_gk20a.o \
common/fb/fb_gm20b.o \
common/fb/fb_gp10b.o \
common/fb/fb_gp106.o \

1
drivers/gpu/nvgpu/Makefile.sources
View File

@@ -62,7 +62,6 @@ srcs := os/posix/nvgpu.c \
common/bus/bus_gv100.c \
common/priv_ring/priv_ring_gm20b.c \
common/priv_ring/priv_ring_gp10b.c \
common/fb/fb_gk20a.c \
common/fb/fb_gm20b.c \
common/fb/fb_gp10b.c \
common/fb/fb_gp106.c \

124
drivers/gpu/nvgpu/common/fb/fb_gk20a.c
View File

@@ -1,124 +0,0 @@
/*
* GK20A memory interface
*
* Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <trace/events/gk20a.h>
#include "gk20a/gk20a.h"
#include "fb_gk20a.h"
#include <nvgpu/timers.h>
#include <nvgpu/io.h>
#include <nvgpu/utils.h>
#include <nvgpu/hw/gk20a/hw_mc_gk20a.h>
#include <nvgpu/hw/gk20a/hw_fb_gk20a.h>
void fb_gk20a_reset(struct gk20a *g)
{
u32 val;
nvgpu_log_info(g, "reset gk20a fb");
val = gk20a_readl(g, mc_elpg_enable_r());
val |= mc_elpg_enable_xbar_enabled_f()
| mc_elpg_enable_pfb_enabled_f()
| mc_elpg_enable_hub_enabled_f();
gk20a_writel(g, mc_elpg_enable_r(), val);
}
void gk20a_fb_init_hw(struct gk20a *g)
{
u32 addr = nvgpu_mem_get_addr(g, &g->mm.sysmem_flush) >> 8;
gk20a_writel(g, fb_niso_flush_sysmem_addr_r(), addr);
}
void gk20a_fb_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb)
{
struct nvgpu_timeout timeout;
u32 addr_lo;
u32 data;
nvgpu_log_fn(g, " ");
/* pagetables are considered sw states which are preserved after
prepare_poweroff. When gk20a deinit releases those pagetables,
common code in vm unmap path calls tlb invalidate that touches
hw. Use the power_on flag to skip tlb invalidation when gpu
power is turned off */
if (!g->power_on) {
return;
}
addr_lo = u64_lo32(nvgpu_mem_get_addr(g, pdb) >> 12);
nvgpu_mutex_acquire(&g->mm.tlb_lock);
trace_gk20a_mm_tlb_invalidate(g->name);
nvgpu_timeout_init(g, &timeout, 1000, NVGPU_TIMER_RETRY_TIMER);
do {
data = gk20a_readl(g, fb_mmu_ctrl_r());
if (fb_mmu_ctrl_pri_fifo_space_v(data) != 0) {
break;
}
nvgpu_udelay(2);
} while (!nvgpu_timeout_expired_msg(&timeout,
"wait mmu fifo space"));
if (nvgpu_timeout_peek_expired(&timeout)) {
goto out;
}
nvgpu_timeout_init(g, &timeout, 1000, NVGPU_TIMER_RETRY_TIMER);
gk20a_writel(g, fb_mmu_invalidate_pdb_r(),
fb_mmu_invalidate_pdb_addr_f(addr_lo) |
nvgpu_aperture_mask(g, pdb,
fb_mmu_invalidate_pdb_aperture_sys_mem_f(),
fb_mmu_invalidate_pdb_aperture_sys_mem_f(),
fb_mmu_invalidate_pdb_aperture_vid_mem_f()));
gk20a_writel(g, fb_mmu_invalidate_r(),
fb_mmu_invalidate_all_va_true_f() |
fb_mmu_invalidate_trigger_true_f());
do {
data = gk20a_readl(g, fb_mmu_ctrl_r());
if (fb_mmu_ctrl_pri_fifo_empty_v(data) !=
fb_mmu_ctrl_pri_fifo_empty_false_f()) {
break;
}
nvgpu_udelay(2);
} while (!nvgpu_timeout_expired_msg(&timeout,
"wait mmu invalidate"));
trace_gk20a_mm_tlb_invalidate_done(g->name);
out:
nvgpu_mutex_release(&g->mm.tlb_lock);
}

33
drivers/gpu/nvgpu/common/fb/fb_gk20a.h
View File

@@ -1,33 +0,0 @@
/*
* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef FB_GK20A_H
#define FB_GK20A_H
struct gk20a;
struct nvgpu_mem;
void fb_gk20a_reset(struct gk20a *g);
void gk20a_fb_init_hw(struct gk20a *g);
void gk20a_fb_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb);
#endif

92
drivers/gpu/nvgpu/common/fb/fb_gm20b.c
View File

@@ -22,22 +22,112 @@
* DEALINGS IN THE SOFTWARE.
*/
#include <trace/events/gk20a.h>
#include <nvgpu/sizes.h>
#include <nvgpu/utils.h>
#include "gk20a/gk20a.h"
#include "fb_gk20a.h"
#include "fb_gm20b.h"
#include <nvgpu/io.h>
#include <nvgpu/timers.h>
#include <nvgpu/hw/gm20b/hw_mc_gm20b.h>
#include <nvgpu/hw/gm20b/hw_fb_gm20b.h>
#define VPR_INFO_FETCH_WAIT (5)
#define WPR_INFO_ADDR_ALIGNMENT 0x0000000c
void gm20b_fb_reset(struct gk20a *g)
{
u32 val;
nvgpu_log_info(g, "reset gk20a fb");
val = gk20a_readl(g, mc_elpg_enable_r());
val |= mc_elpg_enable_xbar_enabled_f()
| mc_elpg_enable_pfb_enabled_f()
| mc_elpg_enable_hub_enabled_f();
gk20a_writel(g, mc_elpg_enable_r(), val);
}
void gm20b_fb_init_hw(struct gk20a *g)
{
u32 addr = nvgpu_mem_get_addr(g, &g->mm.sysmem_flush) >> 8;
gk20a_writel(g, fb_niso_flush_sysmem_addr_r(), addr);
}
void gm20b_fb_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb)
{
struct nvgpu_timeout timeout;
u32 addr_lo;
u32 data;
nvgpu_log_fn(g, " ");
/* pagetables are considered sw states which are preserved after
prepare_poweroff. When gk20a deinit releases those pagetables,
common code in vm unmap path calls tlb invalidate that touches
hw. Use the power_on flag to skip tlb invalidation when gpu
power is turned off */
if (!g->power_on) {
return;
}
addr_lo = u64_lo32(nvgpu_mem_get_addr(g, pdb) >> 12);
nvgpu_mutex_acquire(&g->mm.tlb_lock);
trace_gk20a_mm_tlb_invalidate(g->name);
nvgpu_timeout_init(g, &timeout, 1000, NVGPU_TIMER_RETRY_TIMER);
do {
data = gk20a_readl(g, fb_mmu_ctrl_r());
if (fb_mmu_ctrl_pri_fifo_space_v(data) != 0) {
break;
}
nvgpu_udelay(2);
} while (!nvgpu_timeout_expired_msg(&timeout,
"wait mmu fifo space"));
if (nvgpu_timeout_peek_expired(&timeout)) {
goto out;
}
nvgpu_timeout_init(g, &timeout, 1000, NVGPU_TIMER_RETRY_TIMER);
gk20a_writel(g, fb_mmu_invalidate_pdb_r(),
fb_mmu_invalidate_pdb_addr_f(addr_lo) |
nvgpu_aperture_mask(g, pdb,
fb_mmu_invalidate_pdb_aperture_sys_mem_f(),
fb_mmu_invalidate_pdb_aperture_sys_mem_f(),
fb_mmu_invalidate_pdb_aperture_vid_mem_f()));
gk20a_writel(g, fb_mmu_invalidate_r(),
fb_mmu_invalidate_all_va_true_f() |
fb_mmu_invalidate_trigger_true_f());
do {
data = gk20a_readl(g, fb_mmu_ctrl_r());
if (fb_mmu_ctrl_pri_fifo_empty_v(data) !=
fb_mmu_ctrl_pri_fifo_empty_false_f()) {
break;
}
nvgpu_udelay(2);
} while (!nvgpu_timeout_expired_msg(&timeout,
"wait mmu invalidate"));
trace_gk20a_mm_tlb_invalidate_done(g->name);
out:
nvgpu_mutex_release(&g->mm.tlb_lock);
}
void fb_gm20b_init_fs_state(struct gk20a *g)
{
nvgpu_log_info(g, "initialize gm20b fb");

12
drivers/gpu/nvgpu/common/fb/fb_gm20b.h
View File

@@ -1,7 +1,7 @@
/*
* GM20B FB
*
* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -22,12 +22,18 @@
* DEALINGS IN THE SOFTWARE.
*/
#ifndef _NVHOST_GM20B_FB
#define _NVHOST_GM20B_FB
#ifndef NVGPU_FB_GM20B
#define NVGPU_FB_GM20B
#include <nvgpu/types.h>
struct gk20a;
struct wpr_carveout_info;
struct nvgpu_mem;
void gm20b_fb_reset(struct gk20a *g);
void gm20b_fb_init_hw(struct gk20a *g);
void gm20b_fb_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb);
void fb_gm20b_init_fs_state(struct gk20a *g);
void gm20b_fb_set_mmu_page_size(struct gk20a *g);
bool gm20b_fb_set_use_full_comp_tag_line(struct gk20a *g);

4
drivers/gpu/nvgpu/common/fb/fb_gv11b.c
View File

@@ -40,7 +40,7 @@
#include "gv11b/fifo_gv11b.h"
#include "gv11b/ce_gv11b.h"
#include "fb_gk20a.h"
#include "fb_gm20b.h"
#include "fb_gp10b.h"
#include "fb_gv11b.h"
@@ -64,7 +64,7 @@ static void gv11b_init_nvlink_soc_credits(struct gk20a *g)
void gv11b_fb_init_hw(struct gk20a *g)
{
gk20a_fb_init_hw(g);
gm20b_fb_init_hw(g);
g->ops.fb.enable_hub_intr(g);
}

7
drivers/gpu/nvgpu/gm20b/hal_gm20b.c
View File

@@ -27,7 +27,6 @@
#include "common/bus/bus_gk20a.h"
#include "common/priv_ring/priv_ring_gm20b.h"
#include "common/ptimer/ptimer_gk20a.h"
#include "common/fb/fb_gk20a.h"
#include "common/fb/fb_gm20b.h"
#include "common/therm/therm_gm20b.h"
#include "common/therm/therm_gm20b.h"
@@ -332,8 +331,8 @@ static const struct gpu_ops gm20b_ops = {
.set_debug_mode = gm20b_gr_set_debug_mode,
},
.fb = {
.reset = fb_gk20a_reset,
.init_hw = gk20a_fb_init_hw,
.reset = gm20b_fb_reset,
.init_hw = gm20b_fb_init_hw,
.init_fs_state = fb_gm20b_init_fs_state,
.set_mmu_page_size = gm20b_fb_set_mmu_page_size,
.set_use_full_comp_tag_line =
@@ -350,7 +349,7 @@ static const struct gpu_ops gm20b_ops = {
.read_wpr_info = gm20b_fb_read_wpr_info,
.is_debug_mode_enabled = gm20b_fb_debug_mode_enabled,
.set_debug_mode = gm20b_fb_set_debug_mode,
.tlb_invalidate = gk20a_fb_tlb_invalidate,
.tlb_invalidate = gm20b_fb_tlb_invalidate,
.mem_unlock = NULL,
},
.clock_gating = {

5
drivers/gpu/nvgpu/gp106/hal_gp106.c
View File

@@ -29,7 +29,6 @@
#include "common/bus/bus_gp10b.h"
#include "common/priv_ring/priv_ring_gm20b.h"
#include "common/priv_ring/priv_ring_gp10b.h"
#include "common/fb/fb_gk20a.h"
#include "common/fb/fb_gp10b.h"
#include "common/fb/fb_gm20b.h"
#include "common/fb/fb_gp106.h"
@@ -407,7 +406,7 @@ static const struct gpu_ops gp106_ops = {
},
.fb = {
.reset = gp106_fb_reset,
.init_hw = gk20a_fb_init_hw,
.init_hw = gm20b_fb_init_hw,
.init_fs_state = NULL,
.set_mmu_page_size = gm20b_fb_set_mmu_page_size,
.set_use_full_comp_tag_line =
@@ -424,7 +423,7 @@ static const struct gpu_ops gp106_ops = {
.read_wpr_info = gm20b_fb_read_wpr_info,
.is_debug_mode_enabled = gm20b_fb_debug_mode_enabled,
.set_debug_mode = gm20b_fb_set_debug_mode,
.tlb_invalidate = gk20a_fb_tlb_invalidate,
.tlb_invalidate = gm20b_fb_tlb_invalidate,
.mem_unlock = NULL,
},
.clock_gating = {

7
drivers/gpu/nvgpu/gp10b/hal_gp10b.c
View File

@@ -29,7 +29,6 @@
#include "common/bus/bus_gp10b.h"
#include "common/priv_ring/priv_ring_gm20b.h"
#include "common/priv_ring/priv_ring_gp10b.h"
#include "common/fb/fb_gk20a.h"
#include "common/fb/fb_gm20b.h"
#include "common/fb/fb_gp10b.h"
#include "common/therm/therm_gm20b.h"
@@ -368,8 +367,8 @@ static const struct gpu_ops gp10b_ops = {
.set_debug_mode = gm20b_gr_set_debug_mode,
},
.fb = {
.reset = fb_gk20a_reset,
.init_hw = gk20a_fb_init_hw,
.reset = gm20b_fb_reset,
.init_hw = gm20b_fb_init_hw,
.init_fs_state = fb_gm20b_init_fs_state,
.set_mmu_page_size = gm20b_fb_set_mmu_page_size,
.set_use_full_comp_tag_line =
@@ -386,7 +385,7 @@ static const struct gpu_ops gp10b_ops = {
.read_wpr_info = gm20b_fb_read_wpr_info,
.is_debug_mode_enabled = gm20b_fb_debug_mode_enabled,
.set_debug_mode = gm20b_fb_set_debug_mode,
.tlb_invalidate = gk20a_fb_tlb_invalidate,
.tlb_invalidate = gm20b_fb_tlb_invalidate,
.mem_unlock = NULL,
},
.clock_gating = {

3
drivers/gpu/nvgpu/gv100/hal_gv100.c
View File

@@ -29,7 +29,6 @@
#include "common/priv_ring/priv_ring_gp10b.h"
#include "common/clock_gating/gv100_gating_reglist.h"
#include "common/ptimer/ptimer_gk20a.h"
#include "common/fb/fb_gk20a.h"
#include "common/fb/fb_gm20b.h"
#include "common/fb/fb_gp10b.h"
#include "common/fb/fb_gv11b.h"
@@ -480,7 +479,7 @@ static const struct gpu_ops gv100_ops = {
.read_wpr_info = gm20b_fb_read_wpr_info,
.is_debug_mode_enabled = gm20b_fb_debug_mode_enabled,
.set_debug_mode = gm20b_fb_set_debug_mode,
.tlb_invalidate = gk20a_fb_tlb_invalidate,
.tlb_invalidate = gm20b_fb_tlb_invalidate,
.hub_isr = gv11b_fb_hub_isr,
.mem_unlock = gv100_fb_memory_unlock,
.init_nvlink = gv100_fb_init_nvlink,

3
drivers/gpu/nvgpu/gv11b/hal_gv11b.c
View File

@@ -29,7 +29,6 @@
#include "common/priv_ring/priv_ring_gp10b.h"
#include "common/clock_gating/gv11b_gating_reglist.h"
#include "common/ptimer/ptimer_gk20a.h"
#include "common/fb/fb_gk20a.h"
#include "common/fb/fb_gm20b.h"
#include "common/fb/fb_gp10b.h"
#include "common/fb/fb_gv11b.h"
@@ -444,7 +443,7 @@ static const struct gpu_ops gv11b_ops = {
.read_wpr_info = gm20b_fb_read_wpr_info,
.is_debug_mode_enabled = gm20b_fb_debug_mode_enabled,
.set_debug_mode = gm20b_fb_set_debug_mode,
.tlb_invalidate = gk20a_fb_tlb_invalidate,
.tlb_invalidate = gm20b_fb_tlb_invalidate,
.hub_isr = gv11b_fb_hub_isr,
.handle_replayable_fault = gv11b_fb_handle_replayable_mmu_fault,
.mem_unlock = NULL,

1
drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c
View File

@@ -25,7 +25,6 @@
#include "common/priv_ring/priv_ring_gm20b.h"
#include "common/priv_ring/priv_ring_gp10b.h"
#include "common/clock_gating/gp10b_gating_reglist.h"
#include "common/fb/fb_gk20a.h"
#include "common/fb/fb_gm20b.h"
#include "common/fb/fb_gp10b.h"
#include "common/therm/therm_gm20b.h"

1
drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
View File

@@ -25,7 +25,6 @@
#include "common/priv_ring/priv_ring_gm20b.h"
#include "common/priv_ring/priv_ring_gp10b.h"
#include "common/clock_gating/gv11b_gating_reglist.h"
#include "common/fb/fb_gk20a.h"
#include "common/fb/fb_gm20b.h"
#include "common/fb/fb_gp10b.h"
#include "common/fb/fb_gv11b.h"