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gpu: nvgpu: ga10b: handling gpcclk requests with GPC floor-swept
ga10b supports floor-sweeping of GPCs. Check for tegra soc fuse info, before making gpcclk requests to BPMP for available GPCs. Bug 3362403 Change-Id: I3f5e2d85b785098ce3a8c8d7d8a5621446e94c15 Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2616898 Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -94,6 +94,19 @@ int nvgpu_tegra_fuse_read_reserved_calib(struct gk20a *g, u32 *val);
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*/
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int nvgpu_tegra_fuse_read_gcplex_config_fuse(struct gk20a *g, u32 *val);
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/**
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* @brief - Reads FUSE_OPT_GPC_DISABLE_0 fuse.
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*
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* @param g [in] - GPU super structure.
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* @param val [out] - Populated with register FUSE_OPT_GPC_DISABLE_0 value.
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*
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* - Provide information about the GPU GPC floor-sweep info
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*
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* @return 0 on success or negative value on failure.
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*
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*/
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int nvgpu_tegra_fuse_read_opt_gpc_disable(struct gk20a *g, u32 *val);
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/**
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* @brief - Reads the per-device identifier fuses.
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*
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -33,6 +33,10 @@
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#define FUSE_RESERVED_CALIB0_0 0x204
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#endif
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#ifndef FUSE_OPT_GPC_DISABLE_0
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#define FUSE_OPT_GPC_DISABLE_0 0x188
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#endif
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/* T186+ */
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#if !defined(FUSE_PDI0) && !defined(FUSE_PDI1)
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#define FUSE_PDI0 0x300
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