gpu: nvgpu: get PMU ucode cmd line args DMEM offset

Fetch DMEM size of PMU falcon using common Falcon
interface to copy PMU ucode command lines args
at top of PMU DMEM offset.

Change needed to cleanup dependency between PMU and ACR

JIRA NVGPU-1147

Change-Id: Ie0b1bcf0bdd1afb2c37c1a7d061dc9b03f9fc679
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2012082
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Mahantesh Kumbar
2019-02-05 15:11:04 +05:30
committed by mobile promotions
parent ecc27b3f8b
commit a759ee0ec8
11 changed files with 57 additions and 31 deletions

View File

@@ -778,3 +778,20 @@ int nvgpu_pmu_wait_ready(struct gk20a *g)
return status;
}
void nvgpu_pmu_get_cmd_line_args_offset(struct gk20a *g,
u32 *args_offset)
{
struct nvgpu_pmu *pmu = &g->pmu;
u32 dmem_size = 0;
int err = 0;
err = nvgpu_falcon_get_dmem_size(pmu->flcn, &dmem_size);
if (err != 0) {
nvgpu_err(g, "dmem size request failed");
*args_offset = 0;
return;
}
*args_offset = dmem_size - g->ops.pmu_ver.get_pmu_cmdline_args_size(pmu);
}