gpu: nvgpu: fix misra dir 4.6 and rule 20.7

Fix below misra violations:

directive_4_6_violation: Using basic numerical type "int" rather than
                         a typedef that includes size and signedness
                         information.
rule_20_7_violation: Macro parameter expands into an expression without
                     being wrapped by parentheses

Bug 3763551

Change-Id: I74f2edaef0b21369b76afd596b69157123eca261
Signed-off-by: Santosh BS <santoshb@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2868944
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: V M S Seeta Rama Raju Mudundi <srajum@nvidia.com>
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Santosh BS
2023-03-10 12:53:44 +05:30
committed by mobile promotions
parent f5b50fec4d
commit a7caa8da79
4 changed files with 18 additions and 18 deletions

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -144,10 +144,10 @@
({ \
if (nvgpu_grmgr_is_multi_gr_enabled(g)) { \
u32 gr_syspipe_id = nvgpu_gr_get_syspipe_id(g, \
gr_instance_id); \
(gr_instance_id)); \
nvgpu_grmgr_config_gr_remap_window(g, gr_syspipe_id, \
true); \
g->mig.cur_gr_instance = gr_instance_id; \
(g)->mig.cur_gr_instance = (gr_instance_id); \
(func); \
nvgpu_grmgr_config_gr_remap_window(g, gr_syspipe_id, \
false); \
@@ -158,7 +158,7 @@
#else
#define nvgpu_gr_exec_for_instance(g, gr_instance_id, func) \
({ \
nvgpu_assert(gr_instance_id == 0U); \
nvgpu_assert((gr_instance_id) == 0U); \
(func); \
})
#endif

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -47,7 +47,7 @@
#define nvgpu_timeout_expired_msg_cpu(timeout, caller, fmt, arg...) \
({ \
const struct nvgpu_timeout *t_ptr = (timeout); \
int ret_cpu = 0; \
s32 ret_cpu = 0; \
if (nvgpu_current_time_ns() > t_ptr->time_duration) { \
if ((t_ptr->flags & NVGPU_TIMER_SILENT_TIMEOUT) == 0U) { \
nvgpu_err(t_ptr->g, "Timeout detected @ %p" fmt, \
@@ -55,7 +55,7 @@
} \
ret_cpu = -ETIMEDOUT; \
} \
(int)ret_cpu; \
(s32)ret_cpu; \
})
/**
@@ -79,7 +79,7 @@
#define nvgpu_timeout_expired_msg_retry(timeout, caller, fmt, arg...) \
({ \
struct nvgpu_timeout *t_ptr = (timeout); \
int ret_retry = 0; \
s32 ret_retry = 0; \
if (t_ptr->retries.attempted >= t_ptr->retries.max_attempts) { \
if ((t_ptr->flags & NVGPU_TIMER_SILENT_TIMEOUT) == 0U) { \
nvgpu_err(t_ptr->g, "No more retries @ %p" fmt, \
@@ -89,7 +89,7 @@
} else { \
t_ptr->retries.attempted++; \
} \
(int)ret_retry; \
(s32)ret_retry; \
})
/**
@@ -112,7 +112,7 @@
*/
#define nvgpu_timeout_expired_msg_impl(timeout, caller, fmt, arg...) \
({ \
int ret_timeout = is_fault_injection_set; \
s32 ret_timeout = is_fault_injection_set; \
if (ret_timeout == -1) { \
if (((timeout)->flags & NVGPU_TIMER_RETRY_TIMER) != 0U) { \
ret_timeout = nvgpu_timeout_expired_msg_retry((timeout),\
@@ -122,7 +122,7 @@
caller, fmt, ##arg); \
} \
} \
(int)ret_timeout; \
(s32)ret_timeout; \
})
#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -393,7 +393,7 @@ void nvgpu_delay_usecs(unsigned int usecs);
* @return Shall return 0 if the timeout has not expired; otherwise, an error
* number indicating a timeout is returned.
*/
int nvgpu_timeout_expired_msg_impl(struct nvgpu_timeout *timeout,
s32 nvgpu_timeout_expired_msg_impl(struct nvgpu_timeout *timeout,
void *caller, const char *fmt, ...);
#endif

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2023, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -75,7 +75,7 @@ int nvgpu_timeout_init_flags(struct gk20a *g, struct nvgpu_timeout *timeout,
return 0;
}
static int nvgpu_timeout_expired_msg_cpu(struct nvgpu_timeout *timeout,
static s32 nvgpu_timeout_expired_msg_cpu(struct nvgpu_timeout *timeout,
void *caller,
const char *fmt, va_list args)
{
@@ -100,7 +100,7 @@ static int nvgpu_timeout_expired_msg_cpu(struct nvgpu_timeout *timeout,
return 0;
}
static int nvgpu_timeout_expired_msg_retry(struct nvgpu_timeout *timeout,
static s32 nvgpu_timeout_expired_msg_retry(struct nvgpu_timeout *timeout,
void *caller,
const char *fmt, va_list args)
{
@@ -138,10 +138,10 @@ static int nvgpu_timeout_expired_msg_retry(struct nvgpu_timeout *timeout,
* If a timeout occurs and %NVGPU_TIMER_SILENT_TIMEOUT is not set in the timeout
* then a message is printed based on %fmt.
*/
int nvgpu_timeout_expired_msg_impl(struct nvgpu_timeout *timeout,
s32 nvgpu_timeout_expired_msg_impl(struct nvgpu_timeout *timeout,
void *caller, const char *fmt, ...)
{
int ret;
s32 ret;
va_list args;
va_start(args, fmt);