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gpu: nvgpu: allocate wpr reserve space for NVRISCV pmu

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Falcon image is cleanly partitioned between a code and
data section where we don't need extra reserved space.
NVRISCV image has no clear partition for code and data
section, so we need reserved wpr space for runtime use.

Bug 200709761

Signed-off-by: Ramesh Mylavarapu <rmylavarapu@nvidia.com>
Change-Id: I80fa89fc10d0a0fd2fb8b74bae499b66d5563e00
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2509553
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Ramesh Mylavarapu
2021-04-29 14:05:46 +05:30
committed by mobile promotions
parent a0b1b3f2be
commit a9a7e4f018
1 changed files with 15 additions and 1 deletions
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16
drivers/gpu/nvgpu/common/acr/acr_blob_construct.c
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@@ -54,6 +54,10 @@
#endif #endif
#ifdef CONFIG_NVGPU_LS_PMU #ifdef CONFIG_NVGPU_LS_PMU
#if defined(CONFIG_NVGPU_NEXT)
#define PMU_NVRISCV_WPR_RSVD_BYTES (0x8000)
#endif
int nvgpu_acr_lsf_pmu_ucode_details(struct gk20a *g, void *lsf_ucode_img) int nvgpu_acr_lsf_pmu_ucode_details(struct gk20a *g, void *lsf_ucode_img)
{ {
struct lsf_ucode_desc *lsf_desc; struct lsf_ucode_desc *lsf_desc;
@@ -771,7 +775,17 @@ static int lsf_gen_wpr_requirements(struct gk20a *g,
pnode->lsb_header.app_data_size = pnode->lsb_header.app_data_size =
pnode->lsb_header.data_size; pnode->lsb_header.data_size;
} }
#if defined(CONFIG_NVGPU_NEXT)
/* Falcon image is cleanly partitioned between a code and
* data section where we don't need extra reserved space.
* NVRISCV image has no clear partition for code and data
* section, so need to reserve wpr space.
*/
if (pnode->wpr_header.falcon_id == FALCON_ID_PMU_NEXT_CORE) {
wpr_offset = nvgpu_safe_add_u32(wpr_offset,
(u32)PMU_NVRISCV_WPR_RSVD_BYTES);
}
#endif
pnode = pnode->next; pnode = pnode->next;
} }