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gpu: nvgpu: Introduce NVGPU_DEBUGGER build flag

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Introduce build flag for NVGPU_DEBUGGER. Also introduces Makefile flag
NVGPU_REDUCED and disables NVGPU_DEBUGGER when doing a reduced
build.

Make user space build enable the reduced build.

Change-Id: I84d6142811f674f2a7652e093b63ea5e93d9143e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2002190
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Terje Bergstrom
2019-01-23 12:45:14 -08:00
committed by mobile promotions
parent d174860854
commit a9f404cb99
16 changed files with 75 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
drivers/gpu/nvgpu/gp10b/gr_gp10b.c
View File

@@ -1705,12 +1705,8 @@ int gr_gp10b_pre_process_sm_exception(struct gk20a *g,
bool sm_debugger_attached, struct channel_gk20a *fault_ch,
bool *early_exit, bool *ignore_debugger)
{
int ret;
#ifdef NVGPU_DEBUGGER
bool cilp_enabled = false;
u32 global_mask = 0, dbgr_control0, global_esr_copy;
u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE);
u32 tpc_in_gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_TPC_IN_GPC_STRIDE);
u32 offset = gpc_stride * gpc + tpc_in_gpc_stride * tpc;
struct tsg_gk20a *tsg;
*early_exit = false;
@@ -1730,6 +1726,12 @@ int gr_gp10b_pre_process_sm_exception(struct gk20a *g,
gpc, tpc, global_esr);
if (cilp_enabled && sm_debugger_attached) {
u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE);
u32 tpc_in_gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_TPC_IN_GPC_STRIDE);
u32 offset = gpc_stride * gpc + tpc_in_gpc_stride * tpc;
u32 global_mask = 0, dbgr_control0, global_esr_copy;
int ret;
if ((global_esr & gr_gpc0_tpc0_sm_hww_global_esr_bpt_int_pending_f()) != 0U) {
gk20a_writel(g, gr_gpc0_tpc0_sm_hww_global_esr_r() + offset,
gr_gpc0_tpc0_sm_hww_global_esr_bpt_int_pending_f());
@@ -1806,6 +1808,7 @@ int gr_gp10b_pre_process_sm_exception(struct gk20a *g,
*early_exit = true;
}
#endif
return 0;
}
@@ -1886,8 +1889,10 @@ int gr_gp10b_handle_fecs_error(struct gk20a *g,
goto clean_up;
}
#ifdef NVGPU_DEBUGGER
/* Post events to UMD */
g->ops.debugger.post_events(ch);
#endif
tsg = &g->fifo.tsg[ch->tsgid];

4
drivers/gpu/nvgpu/gp10b/hal_gp10b.c
View File

@@ -766,6 +766,7 @@ static const struct gpu_ops gp10b_ops = {
.debug = {
.show_dump = gk20a_debug_show_dump,
},
#ifdef NVGPU_DEBUGGER
.debugger = {
.post_events = nvgpu_dbg_gpu_post_events,
.dbg_set_powergate = nvgpu_dbg_set_powergate,
@@ -776,6 +777,7 @@ static const struct gpu_ops gp10b_ops = {
.release_profiler_reservation =
nvgpu_release_profiler_reservation,
},
#endif
.perf = {
.enable_membuf = gm20b_perf_enable_membuf,
.disable_membuf = gm20b_perf_disable_membuf,
@@ -885,7 +887,9 @@ int gp10b_init_hal(struct gk20a *g)
gops->regops = gp10b_ops.regops;
gops->mc = gp10b_ops.mc;
gops->debug = gp10b_ops.debug;
#ifdef NVGPU_DEBUGGER
gops->debugger = gp10b_ops.debugger;
#endif
gops->perf = gp10b_ops.perf;
gops->perfbuf = gp10b_ops.perfbuf;
gops->bus = gp10b_ops.bus;