From aa72f2d03a6b9caf7b9742dfd5198b427ed8d6d8 Mon Sep 17 00:00:00 2001 From: Philip Elcan Date: Mon, 25 Feb 2019 12:26:51 -0500 Subject: [PATCH] gpu: nvgpu: volt: fix MISRA 10.3 violations Fix MISRA Rule 10.3 violations in common/pmu/volt for assigning objects of different size or essential type. JIRA NVGPU-1008 Change-Id: I876df3828effd52cab555cc6c1bacfec56e87d23 Signed-off-by: Philip Elcan Reviewed-on: https://git-master.nvidia.com/r/2027657 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: Adeel Raza GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/pmu/volt/volt_pmu.c | 3 --- drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifvolt.h | 8 ++++---- 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/nvgpu/common/pmu/volt/volt_pmu.c b/drivers/gpu/nvgpu/common/pmu/volt/volt_pmu.c index d679d81f2..55baf696e 100644 --- a/drivers/gpu/nvgpu/common/pmu/volt/volt_pmu.c +++ b/drivers/gpu/nvgpu/common/pmu/volt/volt_pmu.c @@ -68,7 +68,6 @@ static int volt_pmu_rpc_execute(struct gk20a *g, struct nv_pmu_volt_rpc *prpc_call) { struct pmu_cmd cmd; - struct pmu_msg msg; struct pmu_payload payload; int status = 0; u32 seqdesc; @@ -76,7 +75,6 @@ static int volt_pmu_rpc_execute(struct gk20a *g, (void) memset(&payload, 0, sizeof(struct pmu_payload)); (void) memset(&cmd, 0, sizeof(struct pmu_cmd)); - (void) memset(&msg, 0, sizeof(struct pmu_msg)); (void) memset(&handler, 0, sizeof(struct volt_rpc_pmucmdhandler_params)); @@ -84,7 +82,6 @@ static int volt_pmu_rpc_execute(struct gk20a *g, cmd.hdr.size = (u32)sizeof(struct nv_pmu_volt_cmd) + (u32)sizeof(struct pmu_hdr); cmd.cmd.volt.cmd_type = NV_PMU_VOLT_CMD_ID_RPC; - msg.hdr.size = sizeof(struct pmu_msg); payload.in.buf = (u8 *)prpc_call; payload.in.size = (u32)sizeof(struct nv_pmu_volt_rpc); diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifvolt.h b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifvolt.h index 0b194a987..d891dd19a 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifvolt.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifvolt.h @@ -1,6 +1,6 @@ /* -* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. -* + * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved. + * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation @@ -267,7 +267,7 @@ struct nv_pmu_volt_cmd_rpc { }; #define NV_PMU_VOLT_CMD_RPC_ALLOC_OFFSET \ - offsetof(struct nv_pmu_volt_cmd_rpc, request) + (u32)offsetof(struct nv_pmu_volt_cmd_rpc, request) struct nv_pmu_volt_cmd { union { @@ -308,7 +308,7 @@ struct nv_pmu_volt_msg_rpc { }; #define NV_PMU_VOLT_MSG_RPC_ALLOC_OFFSET \ - offsetof(struct nv_pmu_volt_msg_rpc, response) + (u32)offsetof(struct nv_pmu_volt_msg_rpc, response) struct nv_pmu_volt_msg { union {