gpu: nvgpu: enhance pbus error reporting

-Dump timeout save0 and save1 even if they could
 be unreliable when fecs_tgt in set in save0 . This
 is good to have for debug purposes.
-Add priv_ring hal for decode_error_code
-Decode fecs error code for supported error types

Bug 1998067

Change-Id: I60cb6902d099df4a7df45fa624e44d9e0d46360f
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1683014
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/gp106/hal_gp106.c

@@ -49,6 +49,7 @@
 #include "gp10b/fb_gp10b.h"
 #include "gp10b/pmu_gp10b.h"
 #include "gp10b/gr_gp10b.h"
+#include "gp10b/priv_ring_gp10b.h"
 
 #include "gp106/fifo_gp106.h"
 #include "gp106/regops_gp106.h"
@@ -729,6 +730,7 @@ static const struct gpu_ops gp106_ops = {
 	},
 	.priv_ring = {
 		.isr = gp10b_priv_ring_isr,
+		.decode_error_code = gp10b_priv_ring_decode_error_code,
 	},
 	.fuse = {
 		.check_priv_security = gp106_fuse_check_priv_security,