From aafc9a45110d4dbbea5afde7e30e43be748f2836 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Konsta=20H=C3=B6ltt=C3=A4?= Date: Fri, 21 Aug 2020 15:28:03 +0300 Subject: [PATCH] gpu: nvgpu: ce: move exec input checks up MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Check the sanity of some input arguments already as the first thing so that a better error code can be returned. Jira NVGPU-5172 Change-Id: I1c847c10166471e520d0e9aaeeef606bd7d8634e Signed-off-by: Konsta Hölttä Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2402030 Reviewed-by: automaticguardword Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-mobile-cert Reviewed-by: Deepak Nibade Reviewed-by: Alex Waterman Reviewed-by: mobile promotions GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/ce/ce_app.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/nvgpu/common/ce/ce_app.c b/drivers/gpu/nvgpu/common/ce/ce_app.c index a0d807b71..3466ab12c 100644 --- a/drivers/gpu/nvgpu/common/ce/ce_app.c +++ b/drivers/gpu/nvgpu/common/ce/ce_app.c @@ -78,6 +78,18 @@ int nvgpu_ce_execute_ops(struct gk20a *g, goto end; } + /* This shouldn't happen */ + if (size == 0ULL) { + ret = -EINVAL; + goto end; + } + + if (request_operation != NVGPU_CE_PHYS_MODE_TRANSFER && + request_operation != NVGPU_CE_MEMSET) { + ret = -EINVAL; + goto end; + } + nvgpu_mutex_acquire(&ce_app->app_mutex); nvgpu_list_for_each_entry_safe(ce_ctx, ce_ctx_save, @@ -319,11 +331,6 @@ u32 nvgpu_ce_prepare_submit(u64 src_buf, u64 low, hi; bool mode_transfer = (request_operation == NVGPU_CE_PHYS_MODE_TRANSFER); - /* failure case handling */ - if ((size == 0ULL) || (request_operation > NVGPU_CE_MEMSET)) { - return 0; - } - /* set the channel object */ cmd_buf_cpu_va[methodSize++] = 0x20018000; cmd_buf_cpu_va[methodSize++] = dma_copy_class;