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gpu: nvgpu: create common sim reg accessors

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sim reg accessors is common after it moved to use os abstract layer reg
accessors.

Bug 2999617

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: I1c0ff7ca1724cde09dd845c077763709ea2ef915
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2517383
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Richard Zhao
2021-03-14 12:03:30 -07:00
committed by mobile promotions
parent 86cb03d2f1
commit ab6d4fa543
8 changed files with 28 additions and 72 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
arch/nvgpu-posix.yaml
View File

@@ -1,4 +1,4 @@
# Copyright (c) 2019-2020, NVIDIA CORPORATION. All Rights Reserved.
# Copyright (c) 2019-2021, NVIDIA CORPORATION. All Rights Reserved.
#
# POSIX elements and units in nvgpu.
#
@@ -29,7 +29,6 @@ all:
os/posix/posix-io.c,
os/posix/posix-nvhost.c,
os/posix/posix-nvlink.c,
os/posix/posix-sim.c,
os/posix/posix-vgpu.c,
os/posix/posix-vidmem.c,
os/posix/fecs_trace_posix.c,

4
drivers/gpu/nvgpu/Makefile.sources
View File

@@ -64,10 +64,6 @@ ifeq ($(CONFIG_NVGPU_LOGGING),1)
srcs += os/posix/log.c
endif
ifeq ($(CONFIG_NVGPU_SIM),1)
srcs += os/posix/posix-sim.c
endif
ifeq ($(CONFIG_NVGPU_DGPU),1)
srcs += os/posix/posix-vidmem.c
endif

12
drivers/gpu/nvgpu/common/sim/sim.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2017-2021, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -31,6 +31,16 @@
#include <nvgpu/bug.h>
#include <nvgpu/string.h>
void sim_writel(struct sim_nvgpu *sim, u32 r, u32 v)
{
nvgpu_os_writel(v, sim->regs + r);
}
u32 sim_readl(struct sim_nvgpu *sim, u32 r)
{
return nvgpu_os_readl(sim->regs + r);
}
int nvgpu_alloc_sim_buffer(struct gk20a *g, struct nvgpu_mem *mem)
{
int err = 0;

3
drivers/gpu/nvgpu/include/nvgpu/linux/sim.h
View File

@@ -2,7 +2,7 @@
*
* nvgpu sim support
*
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -25,7 +25,6 @@ struct platform_device;
struct sim_nvgpu_linux {
struct sim_nvgpu sim;
struct resource *reg_mem;
void __iomem *regs;
void (*remove_support_linux)(struct gk20a *g);
};

1
drivers/gpu/nvgpu/include/nvgpu/sim.h
View File

@@ -44,6 +44,7 @@
struct sim_nvgpu {
struct gk20a *g;
uintptr_t regs;
u32 send_ring_put;
u32 recv_ring_get;
u32 recv_ring_put;

34
drivers/gpu/nvgpu/os/linux/sim.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -32,22 +32,6 @@
#include "os_linux.h"
#include "module.h"
void sim_writel(struct sim_nvgpu *sim, u32 r, u32 v)
{
struct sim_nvgpu_linux *sim_linux =
container_of(sim, struct sim_nvgpu_linux, sim);
writel(v, sim_linux->regs + r);
}
u32 sim_readl(struct sim_nvgpu *sim, u32 r)
{
struct sim_nvgpu_linux *sim_linux =
container_of(sim, struct sim_nvgpu_linux, sim);
return readl(sim_linux->regs + r);
}
void nvgpu_remove_sim_support_linux(struct gk20a *g)
{
struct sim_nvgpu_linux *sim_linux;
@@ -56,10 +40,10 @@ void nvgpu_remove_sim_support_linux(struct gk20a *g)
return;
sim_linux = container_of(g->sim, struct sim_nvgpu_linux, sim);
if (sim_linux->regs) {
if (g->sim->regs) {
sim_writel(g->sim, sim_config_r(), sim_config_mode_disabled_v());
iounmap(sim_linux->regs);
sim_linux->regs = NULL;
iounmap((void __iomem *)g->sim->regs);
g->sim->regs = 0U;
}
nvgpu_kfree(g, sim_linux);
g->sim = NULL;
@@ -69,6 +53,7 @@ int nvgpu_init_sim_support_linux(struct gk20a *g,
struct platform_device *dev)
{
struct sim_nvgpu_linux *sim_linux;
void __iomem *addr;
int err = -ENOMEM;
if (!nvgpu_platform_is_simulation(g))
@@ -79,14 +64,15 @@ int nvgpu_init_sim_support_linux(struct gk20a *g,
return err;
g->sim = &sim_linux->sim;
g->sim->g = g;
sim_linux->regs = nvgpu_devm_ioremap_resource(dev,
addr = nvgpu_devm_ioremap_resource(dev,
GK20A_SIM_IORESOURCE_MEM,
&sim_linux->reg_mem);
if (IS_ERR(sim_linux->regs)) {
NULL);
if (IS_ERR(addr)) {
nvgpu_err(g, "failed to remap gk20a sim regs");
err = PTR_ERR(sim_linux->regs);
err = PTR_ERR(addr);
goto fail;
}
g->sim->regs = (uintptr_t)addr;
sim_linux->remove_support_linux = nvgpu_remove_sim_support_linux;
return 0;

6
drivers/gpu/nvgpu/os/linux/sim_pci.c
View File

@@ -65,9 +65,9 @@ void nvgpu_remove_sim_support_linux_pci(struct gk20a *g)
}
sim_linux = container_of(g->sim, struct sim_nvgpu_linux, sim);
if (sim_linux->regs) {
if (g->sim->regs) {
sim_writel(g->sim, sim_config_r(), sim_config_mode_disabled_v());
sim_linux->regs = NULL;
g->sim->regs = 0U;
}
nvgpu_kfree(g, sim_linux);
g->sim = NULL;
@@ -90,7 +90,7 @@ int nvgpu_init_sim_support_linux_pci(struct gk20a *g)
return err;
g->sim = &sim_linux->sim;
g->sim->g = g;
sim_linux->regs = (void __iomem *)g->regs + sim_r();
g->sim->regs = g->regs + sim_r();
sim_linux->remove_support_linux = nvgpu_remove_sim_support_linux_pci;
return 0;

35
drivers/gpu/nvgpu/os/posix/posix-sim.c
View File

@@ -1,35 +0,0 @@
/*
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <nvgpu/sim.h>
#include <nvgpu/bug.h>
void sim_writel(struct sim_nvgpu *sim, u32 r, u32 v)
{
BUG();
}
u32 sim_readl(struct sim_nvgpu *sim, u32 r)
{
BUG();
return 0;
}