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gpu: nvgpu: Add ERESTARTSYS and SZ_512 to POSIX

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Vidmem common implementation requires ERESTARTSYS and SZ_512. Define
them for POSIX.

JIRA NVGPU-1734

Change-Id: If8d656b56f27516c5f988bc1d4b4251b0e0eab57
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1992458
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Terje Bergstrom
2019-01-10 15:42:23 -08:00
committed by mobile promotions
parent 8c76c98063
commit adb562f58e
2 changed files with 4 additions and 1 deletions
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3
drivers/gpu/nvgpu/include/nvgpu/posix/sizes.h
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -31,6 +31,7 @@
#define SZ_1M (1UL << 20) #define SZ_1M (1UL << 20)
#define SZ_16M (SZ_1M << 4) #define SZ_16M (SZ_1M << 4)
#define SZ_256M (SZ_1M << 8) #define SZ_256M (SZ_1M << 8)
#define SZ_512M (SZ_1M << 9)
#define SZ_1G (1UL << 30) #define SZ_1G (1UL << 30)
#define SZ_4G (SZ_1G << 2) #define SZ_4G (SZ_1G << 2)

2
drivers/gpu/nvgpu/include/nvgpu/posix/types.h
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@@ -228,4 +228,6 @@ static inline bool IS_ERR_OR_NULL(const void *ptr)
return (ptr == NULL) || IS_ERR_VALUE((unsigned long)ptr); return (ptr == NULL) || IS_ERR_VALUE((unsigned long)ptr);
} }
#define ERESTARTSYS ERESTART
#endif #endif