From adee60b3e1c04b2de2f4203f3b5cda5cccfa850b Mon Sep 17 00:00:00 2001
From: Terje Bergstrom <tbergstrom@nvidia.com>
Date: Thu, 14 Feb 2019 10:53:31 -0800
Subject: [PATCH] gpu: nvgpu: Remove memory script support from bios.c

Remove support for executing a memory configuration script. It was
used for gp106, and support for gp106 has been removed.

Change-Id: I91180304f89bfb4e883731555b585ff91c01bb28
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2019461
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
---
 drivers/gpu/nvgpu/common/vbios/bios.c  | 99 --------------------------
 drivers/gpu/nvgpu/include/nvgpu/bios.h |  1 -
 2 files changed, 100 deletions(-)

diff --git a/drivers/gpu/nvgpu/common/vbios/bios.c b/drivers/gpu/nvgpu/common/vbios/bios.c
index 3710e1eba..7cb11a95d 100644
--- a/drivers/gpu/nvgpu/common/vbios/bios.c
+++ b/drivers/gpu/nvgpu/common/vbios/bios.c
@@ -23,7 +23,6 @@
 #include <nvgpu/bios.h>
 #include <nvgpu/io.h>
 #include <nvgpu/gk20a.h>
-#include <nvgpu/hw/gp106/hw_gc6_gp106.h>
 #include <nvgpu/string.h>
 
 #define BIT_HEADER_ID 				0xb8ffU
@@ -920,101 +919,3 @@ u32 nvgpu_bios_read_u32(struct gk20a *g, u32 offset)
 
 	return val;
 }
-
-static void nvgpu_bios_init_xmemsel_zm_nv_reg_array(struct gk20a *g, bool *condition,
-	u32 reg, u32 stride, u32 count, u32 data_table_offset)
-{
-	u8 i;
-	u32 data, strap, index;
-
-	if (*condition) {
-
-		strap = gk20a_readl(g, gc6_sci_strap_r()) & 0xfU;
-
-		index = (g->bios.mem_strap_xlat_tbl_ptr != 0U) ?
-			nvgpu_bios_read_u8(g, g->bios.mem_strap_xlat_tbl_ptr +
-				strap) : strap;
-
-		for (i = 0; i < count; i++) {
-			data = nvgpu_bios_read_u32(g, data_table_offset +
-				((U32(i) * U32(g->bios.mem_strap_data_count) +
-				index) * U32(sizeof(u32))));
-			gk20a_writel(g, reg, data);
-			reg += stride;
-		}
-	}
-}
-
-static void gp106_init_condition(struct gk20a *g, bool *condition,
-	u32 condition_id)
-{
-	struct condition_entry entry;
-
-	entry.cond_addr = nvgpu_bios_read_u32(g, g->bios.condition_table_ptr +
-		sizeof(entry)*condition_id);
-	entry.cond_mask = nvgpu_bios_read_u32(g, g->bios.condition_table_ptr +
-		sizeof(entry)*condition_id + 4U);
-	entry.cond_compare = nvgpu_bios_read_u32(g, g->bios.condition_table_ptr +
-		sizeof(entry)*condition_id + 8U);
-
-	if ((gk20a_readl(g, entry.cond_addr) & entry.cond_mask)
-		!= entry.cond_compare) {
-		*condition = false;
-	}
-}
-
-int nvgpu_bios_execute_script(struct gk20a *g, u32 offset)
-{
-	u8 opcode;
-	u32 ip;
-	u32 operand[8];
-	bool condition, end;
-	int status = 0;
-
-	ip = offset;
-	condition = true;
-	end = false;
-
-	while (!end) {
-
-		opcode = nvgpu_bios_read_u8(g, ip++);
-
-		switch (opcode) {
-
-		case INIT_XMEMSEL_ZM_NV_REG_ARRAY:
-			operand[0] = nvgpu_bios_read_u32(g, ip);
-			operand[1] = nvgpu_bios_read_u8(g, ip+4U);
-			operand[2] = nvgpu_bios_read_u8(g, ip+5U);
-			ip += 6U;
-
-			nvgpu_bios_init_xmemsel_zm_nv_reg_array(g, &condition,
-				operand[0], operand[1], operand[2], ip);
-			ip += operand[2] * sizeof(u32) *
-				g->bios.mem_strap_data_count;
-			break;
-
-		case INIT_CONDITION:
-			operand[0] = nvgpu_bios_read_u8(g, ip);
-			ip++;
-
-			gp106_init_condition(g, &condition, operand[0]);
-			break;
-
-		case INIT_RESUME:
-			condition = true;
-			break;
-
-		case INIT_DONE:
-			end = true;
-			break;
-
-		default:
-			nvgpu_err(g, "opcode: 0x%02x", opcode);
-			end = true;
-			status = -EINVAL;
-			break;
-		}
-	}
-
-	return status;
-}
diff --git a/drivers/gpu/nvgpu/include/nvgpu/bios.h b/drivers/gpu/nvgpu/include/nvgpu/bios.h
index 781416106..389647b03 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/bios.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/bios.h
@@ -1194,7 +1194,6 @@ u16 nvgpu_bios_read_u16(struct gk20a *g, u32 offset);
 u32 nvgpu_bios_read_u32(struct gk20a *g, u32 offset);
 void *nvgpu_bios_get_perf_table_ptrs(struct gk20a *g,
 		struct bit_token *ptoken, u8 table_id);
-int nvgpu_bios_execute_script(struct gk20a *g, u32 offset);
 int nvgpu_bios_get_nvlink_config_data(struct gk20a *g);
 int nvgpu_bios_get_lpwr_nvlink_table_hdr(struct gk20a *g);
 #endif