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gpu: nvgpu: Use TPC_PG_MASK to powergate the TPC

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- In GV11B, read fuse_status_opt_tpc_gpc register
  to read which TPCs are floorswept.
- The driver will also read sysfs node: tpc_pg_mask
- Based on these two values "can_tpc_powergate" will
  be set to true or false and mask will be used to write to
  fuse_ctrl_opt_tpc_gpc register to powergate the TPC.
- can_tpc_powergate = true indicates that the mask value
  sent from userspace is valid and can be used to power gate
  the desired TPC
- can_tpc_powergate = false indicates that the mask value
  sent from userspace is not valid and cannot  be used to
  power gate the desired TPC.

Bug 200532639

Change-Id: Ib0806e4c96305a13b3574e8063ad8e16770aa7cd
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2159219
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Divya Singhatwaria
2019-07-23 10:43:35 +05:30
committed by mobile promotions
parent 47f6bc0c2e
commit ae175e45ed
14 changed files with 176 additions and 32 deletions
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3
drivers/gpu/nvgpu/os/linux/module.c
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@@ -1200,7 +1200,8 @@ static int nvgpu_read_fuse_overrides(struct gk20a *g)
break;
case GV11B_FUSE_OPT_TPC_DISABLE:
if (platform->set_tpc_pg_mask != NULL)
platform->set_tpc_pg_mask(dev_from_gk20a(g), value);
platform->set_tpc_pg_mask(dev_from_gk20a(g),
value);
break;
default:
nvgpu_err(g, "ignore unknown fuse override %08x", fuse);