diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h index ac03a6980..36c18cd6b 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h @@ -40,6 +40,7 @@ * - @ref unit-sdl * - @ref unit-init * - @ref unit-falcon + * - @ref unit-os_utils * - Etc, etc. * * NVGPU Software Unit Design Documentation diff --git a/drivers/gpu/nvgpu/include/nvgpu/io.h b/drivers/gpu/nvgpu/include/nvgpu/io.h index d0dcaa6e4..161e665e6 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/io.h +++ b/drivers/gpu/nvgpu/include/nvgpu/io.h @@ -35,9 +35,36 @@ struct gk20a; +/** + * @brief Write a value to an already mapped io-region. + * + * @param g[in] GPU super structure. + * @param r[in] Register offset in io-region. + * @param v[in] Value to write at the offset. + * + * @return None. + */ void nvgpu_writel(struct gk20a *g, u32 r, u32 v); void nvgpu_writel_relaxed(struct gk20a *g, u32 r, u32 v); + +/** + * @brief Read a value from an already mapped io-region. + * + * @param g[in] GPU super structure. + * @param r[in] Register offset in io-region. + * + * @return Value at the given offset of the io-region. + */ u32 nvgpu_readl(struct gk20a *g, u32 r); + +/** + * @brief Read a value from an already mapped io-region. + * + * @param g[in] GPU super structure. + * @param r[in] Register offset in io-region. + * + * @return Value at the given offset of the io-region. + */ u32 nvgpu_readl_impl(struct gk20a *g, u32 r); void nvgpu_writel_check(struct gk20a *g, u32 r, u32 v); void nvgpu_writel_loop(struct gk20a *g, u32 r, u32 v); diff --git a/drivers/gpu/nvgpu/include/nvgpu/soc.h b/drivers/gpu/nvgpu/include/nvgpu/soc.h index e4a040f23..9abe93fe6 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/soc.h +++ b/drivers/gpu/nvgpu/include/nvgpu/soc.h @@ -26,13 +26,76 @@ struct gk20a; +/** + * @brief Check whether running on silicon or not. + * + * @param g[in] GPU super structure. + * + * @return Returns true if it's silicon else return false. + */ bool nvgpu_platform_is_silicon(struct gk20a *g); + +/** + * @brief Check whether running simulation or not. + * + * @param g[in] GPU super structure. + * + * @return Returns true if it's simulation else returns false. + */ bool nvgpu_platform_is_simulation(struct gk20a *g); + +/** + * @brief Check whether running fpga or not. + * + * @param g[in] GPU super structure. + * + * @return Returns true if it's fpga else returns false. + */ bool nvgpu_platform_is_fpga(struct gk20a *g); + +/** + * @brief Check whether running in virtualized environment. + * + * @param g[in] GPU super structure. + * + * @return Returns true if it's virtualized environment else returns false. + */ bool nvgpu_is_hypervisor_mode(struct gk20a *g); + +/** + * @brief Check whether bpmp server is runing. + * + * @param g[in] GPU super structure. + * + * @return Returns true if bpmp server is running else returns false. + */ bool nvgpu_is_bpmp_running(struct gk20a *g); + +/** + * @brief Check whether soc is t194 and revision a01. + * + * @param g[in] GPU super structure. + * + * @return Returns true if soc is t194-a01 else returns false. + */ bool nvgpu_is_soc_t194_a01(struct gk20a *g); + +/** + * @brief Do soc related init + * + * @param g[in] GPU super structure. + * + * @return Returns 0 on success or in case of failure, a suitable error code. + */ int nvgpu_init_soc_vars(struct gk20a *g); + +/** + * @brief OS specific implementation to provide precise microsecond delay + * + * @param usecs[in] Delay in microseconds. + * + * @return None. + */ void nvgpu_delay_usecs(unsigned int usecs); u64 nvgpu_us_counter(void); u64 nvgpu_get_cycles(void);