nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-22 17:36:20 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: unit: page_table: alignment checks

Browse Source 
For completeness, add some alignment checks to ensure
that mapped VAs are properly aligned.

JIRA NVGPU-2936

Change-Id: I69823bab560c6c9a612db1a5c73b9af90d2839d0
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2077767
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Nicolas Benech
2019-03-20 17:59:06 -04:00
committed by mobile promotions
parent e943e6278a
commit ae2b891ff8
1 changed files with 20 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

21
userspace/units/mm/gmmu/page_table/page_table.c
View File

@@ -67,6 +67,9 @@
#define REQ_C1_IDX_4K_ALIGN 1 #define REQ_C1_IDX_4K_ALIGN 1
#define REQ_C1_IDX_MIXED 2 #define REQ_C1_IDX_MIXED 2
/* Check if address is aligned at the requested boundary */
#define IS_ALIGNED(addr, align) ((addr & (align - 1U)) == 0U)
struct test_parameters { struct test_parameters {
enum nvgpu_aperture aperture; enum nvgpu_aperture aperture;
bool is_iommuable; bool is_iommuable;
@@ -452,7 +455,11 @@ static int test_nvgpu_gmmu_map_unmap(struct unit_module *m,
} }
if (mem.gpu_va == 0) { if (mem.gpu_va == 0) {
unit_return_fail(m, "Failed to map GMMU page"); unit_return_fail(m, "Failed to map GMMU page\n");
}
if (!IS_ALIGNED(mem.gpu_va, SZ_4K)) {
unit_return_fail(m, "Mapped VA is not 4KB-aligned\n");
} }
nvgpu_log(g, gpu_dbg_map, "Mapped VA=%p", (void *) mem.gpu_va); nvgpu_log(g, gpu_dbg_map, "Mapped VA=%p", (void *) mem.gpu_va);
@@ -828,6 +835,10 @@ static int test_nvgpu_gmmu_map_unmap_adv(struct unit_module *m,
unit_return_fail(m, "Failed to map buffer\n"); unit_return_fail(m, "Failed to map buffer\n");
} }
if (!IS_ALIGNED(vaddr, SZ_4K)) {
unit_return_fail(m, "Mapped VA is not 4KB-aligned\n");
}
nvgpu_gmmu_unmap(g->mm.pmu.vm, &mem, vaddr); nvgpu_gmmu_unmap(g->mm.pmu.vm, &mem, vaddr);
return UNIT_SUCCESS; return UNIT_SUCCESS;
@@ -1031,6 +1042,10 @@ static int test_nvgpu_page_table_c1_full(struct unit_module *m,
unit_return_fail(m, "Failed to map i=%d", mem_i); unit_return_fail(m, "Failed to map i=%d", mem_i);
} }
if (!IS_ALIGNED(mem[mem_i].gpu_va, SZ_4K)) {
unit_return_fail(m, "Mapped VA is not 4KB-aligned\n");
}
/* /*
* 3.2. Verify that the programmed page table attributes are * 3.2. Verify that the programmed page table attributes are
* correct * correct
@@ -1066,6 +1081,10 @@ static int c2_fixed_allocation(struct unit_module *m, struct gk20a *g,
unit_return_fail(m, "Failed to map mem_fixed"); unit_return_fail(m, "Failed to map mem_fixed");
} }
if (!IS_ALIGNED(mem_fixed->gpu_va, SZ_4K)) {
unit_return_fail(m, "Mapped VA is not 4KB-aligned\n");
}
/* Verify that the programmed page table attributes are correct */ /* Verify that the programmed page table attributes are correct */
if (check_pte_valid(m, g, vm, mem_fixed) != 0) { if (check_pte_valid(m, g, vm, mem_fixed) != 0) {
return UNIT_FAIL; return UNIT_FAIL;