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gpu: nvgpu: add platform support for Static PG
- Add support for taking static PG config values from DT nodes - Check those values against valid set of values for GPC, TPC and FBP - Store valid values in g->gpc_pg_mask, g->fbp_pg_mask and g->tpc_pg_mask[] array. Bug 200768322 JIRA NVGPU-6433 Change-Id: Ifc87e7d369034b1daa13866bc16a970602514bf6 Signed-off-by: Divya <dsinghatwari@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2594802 Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -81,6 +81,7 @@ struct gk20a_platform {
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/* controls gc off feature for pci gpu */
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bool can_pci_gc_off;
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#ifdef CONFIG_NVGPU_STATIC_POWERGATE
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/* Should be populated at probe. */
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bool can_tpc_pg;
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@@ -89,7 +90,7 @@ struct gk20a_platform {
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/* Should be populated at probe. */
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bool can_gpc_pg;
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#endif
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/* Should be populated at probe. */
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bool can_elpg_init;
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@@ -118,12 +119,14 @@ struct gk20a_platform {
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/* Reset control for device */
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struct reset_control *reset_control;
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#endif
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/* valid TPC-MASK */
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u32 valid_tpc_mask[MAX_TPC_PG_CONFIGS];
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/* Valid GPC and FBP mask */
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u32 valid_gpc_fbp_fs_mask[MAX_GPC_FBP_FS_CONFIGS];
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#ifdef CONFIG_NVGPU_STATIC_POWERGATE
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/* valid TPC-PG MASK */
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u32 valid_tpc_pg_mask[MAX_PG_TPC_CONFIGS];
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/* Valid GPC-PG and FBP-PG mask */
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u32 valid_gpc_fbp_pg_mask[MAX_PG_GPC_FBP_CONFIGS];
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#endif
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/* Delay before rail gated */
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int railgate_delay_init;
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@@ -244,15 +247,16 @@ struct gk20a_platform {
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/* Pre callback is called before frequency change */
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void (*prescale)(struct device *dev);
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#ifdef CONFIG_NVGPU_STATIC_POWERGATE
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/* Set TPC_PG_MASK during probe */
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void (*set_tpc_pg_mask)(struct device *dev, u32 tpc_pg_mask);
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int (*set_tpc_pg_mask)(struct device *dev, u32 dt_tpc_pg_mask);
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/* Set GPC_MASK during probe */
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void (*set_gpc_mask)(struct device *dev, u32 gpc_mask);
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/* Set FBP_MASK during probe */
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void (*set_fbp_mask)(struct device *dev, u32 fbp_mask);
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/* Set GPC_PG_MASK during probe */
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int (*set_gpc_pg_mask)(struct device *dev, u32 dt_gpc_pg_mask);
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/* Set FBP_PG_MASK during probe */
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int (*set_fbp_pg_mask)(struct device *dev, u32 dt_fbp_pg_mask);
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#endif
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/* Devfreq governor name. If scaling is enabled, we request
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* this governor to be used in scaling */
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const char *devfreq_governor;
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