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gpu: nvgpu: verify runnable channel count in TSG

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In runlist we first write channel count in TSG entry and then
follow those many channel entries
If no. of channel entries does not match to count then it is
considered as error

To detect this, add a counter while adding channel entries and
give warning if channel count does not match with this counter

bug 1470692

Change-Id: I4bbfd9b696fbfafa25dffb27979373f057a7f35a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/449228
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Deepak Nibade
2014-07-30 19:50:22 +05:30
committed by Dan Willemsen
parent 478e659ae4
commit ae3ba04955
1 changed files with 6 additions and 0 deletions
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6
drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
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@@ -1701,6 +1701,7 @@ static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id,
struct channel_gk20a *ch = NULL;
struct tsg_gk20a *tsg = NULL;
u32 count = 0;
u32 count_channels_in_tsg;
runlist = &f->runlist_info[runlist_id];
/* valid channel, add/remove it from active list.
@@ -1784,6 +1785,7 @@ static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id,
count++;
/* add runnable channels bound to this TSG */
count_channels_in_tsg = 0;
mutex_lock(&tsg->ch_list_lock);
list_for_each_entry(ch, &tsg->ch_list, ch_entry) {
if (!test_bit(ch->hw_chid,
@@ -1796,8 +1798,12 @@ static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id,
runlist_entry[1] = 0;
runlist_entry += 2;
count++;
count_channels_in_tsg++;
}
mutex_unlock(&tsg->ch_list_lock);
WARN_ON(tsg->num_active_channels !=
count_channels_in_tsg);
}
mutex_unlock(&f->tsg_inuse_mutex);
} else /* suspend to remove all channels */