gpu: nvgpu: unit: add therm unit test

Add unit test for common.therm and gv11b therm HALs.

JIRA NVGPU-936

Change-Id: Iff857ad24eac729b5f7bf9868c1f05becefbaaad
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2260441
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

Makefile.umbrella.tmk

@@ -112,6 +112,7 @@ NV_REPOSITORY_COMPONENTS += userspace/units/enabled
 NV_REPOSITORY_COMPONENTS += userspace/units/falcon
 NV_REPOSITORY_COMPONENTS += userspace/units/falcon/falcon_tests
 NV_REPOSITORY_COMPONENTS += userspace/units/pmu
+NV_REPOSITORY_COMPONENTS += userspace/units/therm
 NV_REPOSITORY_COMPONENTS += userspace/units/top
 NV_REPOSITORY_COMPONENTS += userspace/units/class
 NV_REPOSITORY_COMPONENTS += userspace/units/gr

drivers/gpu/nvgpu/libnvgpu-drv_safe.export

@@ -111,6 +111,7 @@ gv11b_channel_debug_dump
 gv11b_channel_read_state
 gv11b_channel_reset_faulted
 gv11b_channel_unbind
+gv11b_elcg_init_idle_filters
 gv11b_fb_ecc_free
 gv11b_fb_ecc_init
 gv11b_fb_fault_buf_configure_hw
@@ -150,6 +151,7 @@ gv11b_gpu_phys_addr
 gv11b_init_fifo_reset_enable_hw
 gv11b_init_fifo_setup_hw
 gv11b_init_hal
+gv11b_init_therm_setup_hw
 gv11b_is_fault_engine_subid_gpc
 gv11b_mc_is_mmu_fault_pending
 gv11b_mm_copy_from_fault_snap_reg
@@ -176,6 +178,7 @@ gv11b_pbdma_setup_hw
 gv11b_runlist_entry_size
 gv11b_runlist_get_tsg_entry
 gv11b_runlist_get_ch_entry
+gv11b_therm_init_elcg_mode
 gv11b_usermode_base
 gv11b_usermode_bus_base
 gv11b_usermode_doorbell_token
@@ -466,6 +469,7 @@ nvgpu_gmmu_unmap_locked
 nvgpu_init_enabled_flags
 nvgpu_init_hal
 nvgpu_init_mm_support
+nvgpu_init_therm_support
 nvgpu_inst_block_addr
 nvgpu_free_inst_block
 nvgpu_inst_block_ptr

userspace/Makefile.sources

@@ -120,6 +120,7 @@ UNITS :=				\
 	$(UNIT_SRC)/falcon/falcon_tests	\
 	$(UNIT_SRC)/fuse		\
 	$(UNIT_SRC)/pmu			\
+	$(UNIT_SRC)/therm		\
 	$(UNIT_SRC)/top			\
 	$(UNIT_SRC)/class		\
 	$(UNIT_SRC)/gr			\

userspace/required_tests.json

@@ -4082,6 +4082,36 @@
         "unit": "ptimer",
         "test_level": 0
     },
+    {
+        "test": "test_gv11b_elcg_init_idle_filters",
+        "case": "gv11b_elcg_init_idle_filters",
+        "unit": "therm",
+        "test_level": 0
+    },
+    {
+        "test": "test_gv11b_therm_init_elcg_mode",
+        "case": "gv11b_therm_init_elcg_mode",
+        "unit": "therm",
+        "test_level": 0
+    },
+    {
+        "test": "test_free_env",
+        "case": "therm_free_env",
+        "unit": "therm",
+        "test_level": 0
+    },
+    {
+        "test": "test_therm_init_support",
+        "case": "therm_init_support",
+        "unit": "therm",
+        "test_level": 0
+    },
+    {
+        "test": "test_setup_env",
+        "case": "therm_setup_env",
+        "unit": "therm",
+        "test_level": 0
+    },
     {
         "test": "test_device_info_parse_data",
         "case": "top_device_info_parse_data",

userspace/units/therm/Makefile

@@ -0,0 +1,26 @@
+# Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+# DEALINGS IN THE SOFTWARE.
+
+.SUFFIXES:
+
+OBJS   = nvgpu-therm.o nvgpu-therm-gv11b.o
+MODULE = therm
+
+include ../Makefile.units

userspace/units/therm/Makefile.interface.tmk

@@ -0,0 +1,23 @@
+################################### tell Emacs this is a -*- makefile-gmake -*-
+#
+# Copyright (c) 2019, NVIDIA CORPORATION.  All Rights Reserved.
+#
+# NVIDIA CORPORATION and its licensors retain all intellectual property
+# and proprietary rights in and to this software, related documentation
+# and any modifications thereto.  Any use, reproduction, disclosure or
+# distribution of this software and related documentation without an express
+# license agreement from NVIDIA CORPORATION is strictly prohibited.
+#
+# tmake for SW Mobile component makefile
+#
+###############################################################################
+
+NVGPU_UNIT_NAME=therm
+
+include $(NV_COMPONENT_DIR)/../Makefile.units.common.interface.tmk
+
+# Local Variables:
+# indent-tabs-mode: t
+# tab-width: 8
+# End:
+# vi: set tabstop=8 noexpandtab:

userspace/units/therm/Makefile.tmk

@@ -0,0 +1,24 @@
+################################### tell Emacs this is a -*- makefile-gmake -*-
+#
+# Copyright (c) 2019, NVIDIA CORPORATION.  All Rights Reserved.
+#
+# NVIDIA CORPORATION and its licensors retain all intellectual property
+# and proprietary rights in and to this software, related documentation
+# and any modifications thereto.  Any use, reproduction, disclosure or
+# distribution of this software and related documentation without an express
+# license agreement from NVIDIA CORPORATION is strictly prohibited.
+#
+# tmake for SW Mobile component makefile
+#
+###############################################################################
+
+NVGPU_UNIT_NAME=therm
+NVGPU_UNIT_SRCS=nvgpu-therm.c nvgpu-therm-gv11b.c
+
+include $(NV_COMPONENT_DIR)/../Makefile.units.common.tmk
+
+# Local Variables:
+# indent-tabs-mode: t
+# tab-width: 8
+# End:
+# vi: set tabstop=8 noexpandtab:

userspace/units/therm/nvgpu-therm-gv11b.c

@@ -0,0 +1,146 @@
+/*
+ * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unit/unit.h>
+#include <unit/io.h>
+#include <nvgpu/posix/io.h>
+
+#include <nvgpu/gk20a.h>
+#include <nvgpu/therm.h>
+#include <hal/therm/therm_gv11b.h>
+#include <nvgpu/hw/gv11b/hw_therm_gv11b.h>
+#include <nvgpu/power_features/cg.h>
+#include <nvgpu/fifo.h>
+#include <os/posix/os_posix.h>
+
+#include "nvgpu-therm.h"
+
+#define NUM_ENGINES 2
+#define INVALID_GATE_MODE 100
+
+int test_gv11b_therm_init_elcg_mode(struct unit_module *m, struct gk20a *g,
+					void *args)
+{
+	int ret = UNIT_FAIL;
+	unsigned int engine, i;
+	u32 val;
+	struct match_struct {
+		u32 mode;
+		u32 mask;
+	};
+	struct match_struct match_table[] = {
+		{ ELCG_RUN,
+		  therm_gate_ctrl_idle_holdoff_on_f() |
+		  therm_gate_ctrl_eng_clk_run_f()
+		},
+		{ ELCG_AUTO,		therm_gate_ctrl_eng_clk_auto_f() },
+		{ ELCG_STOP,		therm_gate_ctrl_eng_clk_stop_f() },
+		{ INVALID_GATE_MODE,	0x00000000 },
+	};
+
+	/* enable ELCG */
+	nvgpu_set_enabled(g, NVGPU_GPU_CAN_ELCG, true);
+
+	for (engine = 0U; engine < NUM_ENGINES; engine++) {
+		for (i = 0U; i < ARRAY_SIZE(match_table); i++) {
+			/* clear the therm gate control reg */
+			nvgpu_posix_io_writel_reg_space(g,
+						therm_gate_ctrl_r(engine), 0U);
+			gv11b_therm_init_elcg_mode(g, match_table[i].mode,
+						engine);
+			val = nvgpu_posix_io_readl_reg_space(g,
+						therm_gate_ctrl_r(engine));
+			unit_assert(val == match_table[i].mask, goto done);
+		}
+	}
+
+	/* test with ELCG disabled */
+	nvgpu_set_enabled(g, NVGPU_GPU_CAN_ELCG, false);
+	nvgpu_posix_io_writel_reg_space(g, therm_gate_ctrl_r(0), 0U);
+	gv11b_therm_init_elcg_mode(g, ELCG_RUN, 0);
+	val = nvgpu_posix_io_readl_reg_space(g, therm_gate_ctrl_r(0));
+	unit_assert(val == 0U, goto done);
+
+	ret = UNIT_SUCCESS;
+
+done:
+	return ret;
+}
+
+int test_gv11b_elcg_init_idle_filters(struct unit_module *m, struct gk20a *g,
+					void *args)
+{
+	int ret = UNIT_FAIL;
+	int err;
+	struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
+	unsigned int i;
+	u32 val;
+	const u32 expect_gate_ctrl =
+			(therm_gate_ctrl_eng_idle_filt_exp__prod_f() |
+			 therm_gate_ctrl_eng_idle_filt_mant__prod_f() |
+			 therm_gate_ctrl_eng_delay_before__prod_f() |
+			 therm_gate_ctrl_eng_delay_after__prod_f());
+
+	/* setup FIFO info & regs */
+	g->fifo.num_engines = NUM_ENGINES;
+	g->fifo.active_engines_list = (u32 *)calloc(sizeof(u32), NUM_ENGINES);
+	unit_assert(g->fifo.active_engines_list != NULL, return UNIT_FAIL);
+	for (i = 0U; i < NUM_ENGINES; i++) {
+		g->fifo.active_engines_list[i] = i;
+		nvgpu_posix_io_writel_reg_space(g, therm_gate_ctrl_r(i), 0U);
+	}
+	nvgpu_posix_io_writel_reg_space(g, therm_fecs_idle_filter_r(), 0U);
+	nvgpu_posix_io_writel_reg_space(g, therm_hubmmu_idle_filter_r(), 0U);
+
+	/* make sure nothing happens if we're in simulation */
+	p->is_simulation = true;
+	err = gv11b_elcg_init_idle_filters(g);
+	unit_assert(err == 0, goto done);
+	val = nvgpu_posix_io_readl_reg_space(g, therm_fecs_idle_filter_r());
+	unit_assert(val == 0U, goto done);
+	val = nvgpu_posix_io_readl_reg_space(g, therm_hubmmu_idle_filter_r());
+	unit_assert(val == 0U, goto done);
+	for (i = 0U; i < NUM_ENGINES; i++) {
+		val = nvgpu_posix_io_readl_reg_space(g, therm_gate_ctrl_r(i));
+		unit_assert(val == 0U, goto done);
+	}
+	p->is_simulation = false;
+
+	/* now test the default case */
+	err = gv11b_elcg_init_idle_filters(g);
+	unit_assert(err == 0, goto done);
+	val = nvgpu_posix_io_readl_reg_space(g, therm_fecs_idle_filter_r());
+	unit_assert(val == 0U, goto done);
+	val = nvgpu_posix_io_readl_reg_space(g, therm_hubmmu_idle_filter_r());
+	unit_assert(val == 0U, goto done);
+	for (i = 0U; i < NUM_ENGINES; i++) {
+		val = nvgpu_posix_io_readl_reg_space(g, therm_gate_ctrl_r(i));
+		unit_assert(val == expect_gate_ctrl, goto done);
+	}
+
+	ret = UNIT_SUCCESS;
+
+done:
+	free(g->fifo.active_engines_list);
+
+	return ret;
+}

userspace/units/therm/nvgpu-therm.c

@@ -0,0 +1,142 @@
+/*
+ * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unit/unit.h>
+#include <unit/io.h>
+#include <nvgpu/posix/io.h>
+
+#include <nvgpu/gk20a.h>
+#include <nvgpu/therm.h>
+#include <hal/therm/therm_gv11b.h>
+
+#include "nvgpu-therm.h"
+
+#define THERM_ADDR_SPACE_START	0x00020000
+#define THERM_ADDR_SPACE_SIZE	0xfff
+
+/*
+ * Mock I/O
+ */
+
+/*
+ * Write callback. Forward the write access to the mock IO framework.
+ */
+static void writel_access_reg_fn(struct gk20a *g,
+				 struct nvgpu_reg_access *access)
+{
+	nvgpu_posix_io_writel_reg_space(g, access->addr, access->value);
+}
+
+/*
+ * Read callback. Get the register value from the mock IO framework.
+ */
+static void readl_access_reg_fn(struct gk20a *g,
+				struct nvgpu_reg_access *access)
+{
+	access->value = nvgpu_posix_io_readl_reg_space(g, access->addr);
+}
+
+static struct nvgpu_posix_io_callbacks test_reg_callbacks = {
+	/* Write APIs all can use the same accessor. */
+	.writel          = writel_access_reg_fn,
+	.writel_check    = writel_access_reg_fn,
+	.bar1_writel     = writel_access_reg_fn,
+	.usermode_writel = writel_access_reg_fn,
+
+	/* Likewise for the read APIs. */
+	.__readl         = readl_access_reg_fn,
+	.readl           = readl_access_reg_fn,
+	.bar1_readl      = readl_access_reg_fn,
+};
+
+static int mock_hal_fail(struct gk20a *g)
+{
+	return -1;
+}
+
+int test_setup_env(struct unit_module *m,
+			  struct gk20a *g, void *args)
+{
+	/* Create therm register space */
+	nvgpu_posix_io_init_reg_space(g);
+	if (nvgpu_posix_io_add_reg_space(g, THERM_ADDR_SPACE_START,
+						THERM_ADDR_SPACE_SIZE) != 0) {
+		unit_err(m, "%s: failed to create register space\n",
+			 __func__);
+		return UNIT_FAIL;
+	}
+	(void)nvgpu_posix_register_io(g, &test_reg_callbacks);
+
+	/* setup HALs */
+	g->ops.therm.init_therm_setup_hw = gv11b_init_therm_setup_hw;
+	g->ops.therm.init_elcg_mode = gv11b_therm_init_elcg_mode;
+	g->ops.therm.elcg_init_idle_filters = gv11b_elcg_init_idle_filters;
+
+	return UNIT_SUCCESS;
+}
+
+int test_free_env(struct unit_module *m, struct gk20a *g, void *args)
+{
+	nvgpu_posix_io_delete_reg_space(g, THERM_ADDR_SPACE_START);
+
+	return UNIT_SUCCESS;
+}
+
+int test_therm_init_support(struct unit_module *m, struct gk20a *g, void *args)
+{
+	int ret = UNIT_FAIL;
+	int err ;
+	int (*save_hal)(struct gk20a *g);
+
+	save_hal = g->ops.therm.init_therm_setup_hw;
+
+	/* default case */
+	err = nvgpu_init_therm_support(g);
+	unit_assert(err == 0, goto done);
+
+	/* set this HAL to NULL for branch coverage */
+	g->ops.therm.init_therm_setup_hw = NULL;
+	err = nvgpu_init_therm_support(g);
+	unit_assert(err == 0, goto done);
+
+	/* make this HAL return error */
+	g->ops.therm.init_therm_setup_hw = mock_hal_fail;
+	err = nvgpu_init_therm_support(g);
+	unit_assert(err != 0, goto done);
+
+	ret = UNIT_SUCCESS;
+
+done:
+	g->ops.therm.init_therm_setup_hw = save_hal;
+
+	return ret;
+}
+
+struct unit_module_test therm_tests[] = {
+	UNIT_TEST(therm_setup_env,		test_setup_env,				NULL, 0),
+	UNIT_TEST(therm_init_support,		test_therm_init_support,		NULL, 0),
+	UNIT_TEST(gv11b_therm_init_elcg_mode,	test_gv11b_therm_init_elcg_mode,	NULL, 0),
+	UNIT_TEST(gv11b_elcg_init_idle_filters,	test_gv11b_elcg_init_idle_filters,	NULL, 0),
+	UNIT_TEST(therm_free_env,		test_free_env,				NULL, 0),
+};
+
+UNIT_MODULE(therm, therm_tests, UNIT_PRIO_NVGPU_TEST);

userspace/units/therm/nvgpu-therm.h

@@ -0,0 +1,153 @@
+/*
+ * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef UNIT_NVGPU_THERM_H
+#define UNIT_NVGPU_THERM_H
+
+struct gk20a;
+struct unit_module;
+
+/** @addtogroup SWUTS-therm
+ *  @{
+ *
+ * Software Unit Test Specification for therm
+ */
+
+/**
+ * Test specification for: test_setup_env
+ *
+ * Description: Do basic setup before starting other tests.
+ *
+ * Test Type: Other (setup)
+ *
+ * Input: None
+ *
+ * Steps:
+ * - Initialize reg spaces used by tests.
+ * - Setup HAL function pointers.
+ *
+ * Output:
+ * - UNIT_FAIL if encounters an error creating reg space
+ * - UNIT_SUCCESS otherwise
+ */
+int test_setup_env(struct unit_module *m,
+			  struct gk20a *g, void *args);
+
+/**
+ * Test specification for: test_free_env
+ *
+ * Description: Cleanup resources allocated in test_setup_env
+ *
+ * Test Type: Other (setup)
+ *
+ * Input: test_setup_env has run.
+ *
+ * Steps:
+ * - Free reg spaces.
+ *
+ * Output: UNIT_SUCCESS always.
+ */
+int test_free_env(struct unit_module *m, struct gk20a *g, void *args);
+
+/**
+ * Test specification for: test_therm_init_support
+ *
+ * Description: Validate API nvgpu_init_therm_support.
+ *
+ * Test Type: Feature based, Error guessing.
+ *
+ * Targets: nvgpu_init_therm_support
+ *
+ * Input: test_setup_env has run.
+ *
+ * Steps:
+ * - Call API nvgpu_init_therm_support and verify it returns success.
+ * - Set the HAL init_therm_setup_hw to NULL.
+ * - Call API nvgpu_init_therm_support and verify it returns success.
+ * - Set the HAL init_therm_setup_hw to a mock function that returns failure.
+ * - Call API nvgpu_init_therm_support and verify it returns err.
+ *
+ * Output: Returns PASS if expected result is met, FAIL otherwise.
+ */
+int test_therm_init_support(struct unit_module *m, struct gk20a *g, void *args);
+
+/**
+ * Test specification for: test_gv11b_therm_init_elcg_mode
+ *
+ * Description: Validate HAL gv11b_therm_init_elcg_mode.
+ *
+ * Test Type: Feature based, Error guessing.
+ *
+ * Targets: gv11b_therm_init_elcg_mode
+ *
+ * Test Type: Feature based, Error guessing.
+ *
+ * Steps:
+ * - Enable ELCG flag.
+ * - Loop through 2 engines:
+ *   - Loop through all Gate modes (RUN, AUTO, STOP), for each iteration:
+ *     - Set the THERM_GATE_CTRL register to 0.
+ *     - Call the HAL gv11b_therm_init_elcg_mode.
+ *     - Read the THERM_GATE_CTRL register and verify register setting.
+ *   - Repeat for an Invalid Gate mode for branch coverage.
+ * - Disable ELCG flag.
+ * - Set the THERM_GATE_CTRL register to 0.
+ * - Call the HAL gv11b_therm_init_elcg_mode.
+ * - Read the THERM_GATE_CTRL register and verify register setting were
+ *   unchanged.
+ * Output: Returns PASS if expected result is met, FAIL otherwise.
+ */
+int test_gv11b_therm_init_elcg_mode(struct unit_module *m, struct gk20a *g,
+					void *args);
+
+/**
+ * Test specification for: test_gv11b_elcg_init_idle_filters
+ *
+ * Description: Validate HAL gv11b_elcg_init_idle_filters.
+ *
+ * Test Type: Feature based, Error guessing.
+ *
+ * Targets: gv11b_elcg_init_idle_filters
+ *
+ * Input: test_setup_env has run.
+ *
+ * Steps:
+ * - Setup FIFO in gk20a struct for 2 active engines.
+ * - Set the THERM_GATE_CTRL, THERM_FECS_IDLE_FILTER and
+ *   THERM_HUBMMU_IDLE_FILTER registers to 0.
+ * - Set the mock flag for simulation mode.
+ * - Call the HAL gv11b_elcg_init_idle_filters.
+ * - Verify the API returns success and no register values were changed.
+ * - Clear the mock flag for simulation mode.
+ * - Call the HAL gv11b_elcg_init_idle_filters.
+ * - Verify the API returns success and the register values were correct.
+ *
+ * Output: Returns PASS if expected result is met, FAIL otherwise.
+ */
+int test_gv11b_elcg_init_idle_filters(struct unit_module *m, struct gk20a *g,
+					void *args);
+
+/**
+ * @}
+ */
+
+#endif /* UNIT_NVGPU_THERM_H */