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gpu: nvgpu: use correct gr_config pointer to return tpc masks

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In gk20a_ctrl_get_tpc_masks() receive gr_config pointer from caller
instead of extracting with nvgpu_gr_get_config_ptr().

GR engine current instance value is not set here so this was always
returning 0th instance gr_config pointer.

Jira NVGPU-5648

Change-Id: I7f4df0c464cd357d05ac7d5c3b9e4abe0ac9a8af
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2441667
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Lakshmanan M <lm@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Deepak Nibade
2020-11-05 11:45:20 +05:30
committed by Alex Waterman
parent bd114e8d0f
commit af4f38fb6e
1 changed files with 2 additions and 3 deletions
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5
drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c
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@@ -672,11 +672,10 @@ clean_up:
return err; return err;
} }
static int gk20a_ctrl_get_tpc_masks(struct gk20a *g, static int gk20a_ctrl_get_tpc_masks(struct gk20a *g, struct nvgpu_gr_config *gr_config,
struct nvgpu_gpu_get_tpc_masks_args *args) struct nvgpu_gpu_get_tpc_masks_args *args)
{ {
int err = 0; int err = 0;
struct nvgpu_gr_config *gr_config = nvgpu_gr_get_config_ptr(g);
const u32 gpc_tpc_mask_size = sizeof(u32) * const u32 gpc_tpc_mask_size = sizeof(u32) *
nvgpu_gr_config_get_max_gpc_count(gr_config); nvgpu_gr_config_get_max_gpc_count(gr_config);
@@ -2048,7 +2047,7 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg
(struct nvgpu_gpu_open_tsg_args *)buf); (struct nvgpu_gpu_open_tsg_args *)buf);
break; break;
case NVGPU_GPU_IOCTL_GET_TPC_MASKS: case NVGPU_GPU_IOCTL_GET_TPC_MASKS:
err = gk20a_ctrl_get_tpc_masks(g, err = gk20a_ctrl_get_tpc_masks(g, gr_config,
(struct nvgpu_gpu_get_tpc_masks_args *)buf); (struct nvgpu_gpu_get_tpc_masks_args *)buf);
break; break;
case NVGPU_GPU_IOCTL_GET_FBP_L2_MASKS: case NVGPU_GPU_IOCTL_GET_FBP_L2_MASKS: