From af652f0bb75d9762dd7f290c37cb29b4e40aafdf Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Thu, 21 Jun 2018 03:18:05 -0700 Subject: [PATCH] gpu: nvgpu: fix sim readl output configuration In nvgpu_sim_esc_readl() we prepare a message, issue RPC and then copy back the response from offset "data_offset + 0xc" But while configuring the message we incorrectly set the response offset as just "data_offset" Fix this by correctly configuring the response offset as "data_offset + 0xc" Jira NVGPUT-41 Change-Id: I855e140b97e7128367446d0962eec283b069f514 Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/1756844 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/sim_pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/nvgpu/common/sim_pci.c b/drivers/gpu/nvgpu/common/sim_pci.c index a12b44224..024a60d5b 100644 --- a/drivers/gpu/nvgpu/common/sim_pci.c +++ b/drivers/gpu/nvgpu/common/sim_pci.c @@ -196,7 +196,7 @@ static void nvgpu_sim_esc_readl(struct gk20a *g, *sim_msg_param(g, 0) = index; *sim_msg_param(g, 4) = sizeof(u32); data_offset = roundup(pathlen + 1, sizeof(u32)); - *sim_msg_param(g, 8) = data_offset; + *sim_msg_param(g, 8) = data_offset + 0xc; strcpy((char *)sim_msg_param(g, 0xc), path); err = issue_rpc_and_wait(g);