gpu: nvgpu: add support for L3 cache allocation of buffers

Add gv11b implementation of gpu_phys_addr() that checks the t19x
GMMU attributes struct to determine if L3 allocation should be
enabled. If L3 alloc is enabled then a special physical address
bit is set.

Add flag NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC to struct
nvgpu_as_map_buffer_ex_args so that User space can add a hint to
allocate buffer in L3 cache

Jira GPUT19X-10
Bug 200279508

Change-Id: I1bb9876a670b252980922aa50e3e69b802be137f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master/r/1512602
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
This commit is contained in:
Deepak Nibade
2017-07-03 16:40:44 +05:30
committed by mobile promotions
parent cca0510e47
commit afa31cdd8c
5 changed files with 77 additions and 0 deletions

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@@ -1,6 +1,7 @@
nvgpu-t19x := ../../../../nvgpu-t19x/drivers/gpu/nvgpu nvgpu-t19x := ../../../../nvgpu-t19x/drivers/gpu/nvgpu
nvgpu-y += \ nvgpu-y += \
$(nvgpu-t19x)/common/mm/gmmu_t19x.o \
$(nvgpu-t19x)/common/linux/ioctl_tsg_t19x.o \ $(nvgpu-t19x)/common/linux/ioctl_tsg_t19x.o \
$(nvgpu-t19x)/gv11b/gv11b.o \ $(nvgpu-t19x)/gv11b/gv11b.o \
$(nvgpu-t19x)/gv11b/bus_gv11b.o \ $(nvgpu-t19x)/gv11b/bus_gv11b.o \

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@@ -0,0 +1,25 @@
/*
* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <uapi/linux/nvgpu.h>
#include <nvgpu/gmmu.h>
void nvgpu_gmmu_add_t19x_attrs(struct nvgpu_gmmu_attrs *attrs, u32 flags)
{
attrs->t19x_attrs.l3_alloc = (bool)(flags &
NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC);
}

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@@ -23,6 +23,8 @@
#include <nvgpu/hw/gv11b/hw_fb_gv11b.h> #include <nvgpu/hw/gv11b/hw_fb_gv11b.h>
#define NVGPU_L3_ALLOC_BIT 36
static bool gv11b_mm_is_bar1_supported(struct gk20a *g) static bool gv11b_mm_is_bar1_supported(struct gk20a *g)
{ {
return false; return false;
@@ -61,6 +63,20 @@ void gv11b_mm_l2_flush(struct gk20a *g, bool invalidate)
g->ops.mm.fb_flush(g); g->ops.mm.fb_flush(g);
} }
/*
* On Volta the GPU determines whether to do L3 allocation for a mapping by
* checking bit 36 of the phsyical address. So if a mapping should allocte lines
* in the L3 this bit must be set.
*/
u64 gv11b_gpu_phys_addr(struct gk20a *g,
struct nvgpu_gmmu_attrs *attrs, u64 phys)
{
if (attrs->t19x_attrs.l3_alloc)
return phys | NVGPU_L3_ALLOC_BIT;
return phys;
}
void gv11b_init_mm(struct gpu_ops *gops) void gv11b_init_mm(struct gpu_ops *gops)
{ {
gp10b_init_mm(gops); gp10b_init_mm(gops);
@@ -69,4 +85,5 @@ void gv11b_init_mm(struct gpu_ops *gops)
gops->mm.init_mm_setup_hw = gk20a_init_mm_setup_hw; gops->mm.init_mm_setup_hw = gk20a_init_mm_setup_hw;
gops->mm.mmu_fault_pending = gv11b_mm_mmu_fault_pending; gops->mm.mmu_fault_pending = gv11b_mm_mmu_fault_pending;
gops->mm.l2_flush = gv11b_mm_l2_flush; gops->mm.l2_flush = gv11b_mm_l2_flush;
gops->mm.gpu_phys_addr = gv11b_gpu_phys_addr;
} }

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@@ -0,0 +1,28 @@
/*
* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __NVGPU_GMMU_T19X_H__
#define __NVGPU_GMMU_T19X_H__
struct nvgpu_gmmu_attrs;
struct nvgpu_gmmu_attrs_t19x {
bool l3_alloc;
};
void nvgpu_gmmu_add_t19x_attrs(struct nvgpu_gmmu_attrs *attrs, u32 flags);
#endif

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@@ -27,6 +27,12 @@
#define NVGPU_GPU_ARCH_GV110 0x00000150 #define NVGPU_GPU_ARCH_GV110 0x00000150
#define NVGPU_GPU_IMPL_GV11B 0x0000000B #define NVGPU_GPU_IMPL_GV11B 0x0000000B
/*
* this flag is used in struct nvgpu_as_map_buffer_ex_args
* to provide L3 cache allocation hint
*/
#define NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC (1 << 7)
/* subcontexts are available */ /* subcontexts are available */
#define NVGPU_GPU_FLAGS_SUPPORT_TSG_SUBCONTEXTS (1ULL << 22) #define NVGPU_GPU_FLAGS_SUPPORT_TSG_SUBCONTEXTS (1ULL << 22)