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gpu: nvgpu: add support for L3 cache allocation of buffers
Add gv11b implementation of gpu_phys_addr() that checks the t19x GMMU attributes struct to determine if L3 allocation should be enabled. If L3 alloc is enabled then a special physical address bit is set. Add flag NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC to struct nvgpu_as_map_buffer_ex_args so that User space can add a hint to allocate buffer in L3 cache Jira GPUT19X-10 Bug 200279508 Change-Id: I1bb9876a670b252980922aa50e3e69b802be137f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master/r/1512602 GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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@@ -1,6 +1,7 @@
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nvgpu-t19x := ../../../../nvgpu-t19x/drivers/gpu/nvgpu
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nvgpu-t19x := ../../../../nvgpu-t19x/drivers/gpu/nvgpu
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nvgpu-y += \
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nvgpu-y += \
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$(nvgpu-t19x)/common/mm/gmmu_t19x.o \
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$(nvgpu-t19x)/common/linux/ioctl_tsg_t19x.o \
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$(nvgpu-t19x)/common/linux/ioctl_tsg_t19x.o \
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$(nvgpu-t19x)/gv11b/gv11b.o \
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$(nvgpu-t19x)/gv11b/gv11b.o \
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$(nvgpu-t19x)/gv11b/bus_gv11b.o \
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$(nvgpu-t19x)/gv11b/bus_gv11b.o \
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25
drivers/gpu/nvgpu/common/mm/gmmu_t19x.c
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25
drivers/gpu/nvgpu/common/mm/gmmu_t19x.c
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@@ -0,0 +1,25 @@
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/*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <uapi/linux/nvgpu.h>
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#include <nvgpu/gmmu.h>
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void nvgpu_gmmu_add_t19x_attrs(struct nvgpu_gmmu_attrs *attrs, u32 flags)
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{
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attrs->t19x_attrs.l3_alloc = (bool)(flags &
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NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC);
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}
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@@ -23,6 +23,8 @@
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#include <nvgpu/hw/gv11b/hw_fb_gv11b.h>
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#include <nvgpu/hw/gv11b/hw_fb_gv11b.h>
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#define NVGPU_L3_ALLOC_BIT 36
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static bool gv11b_mm_is_bar1_supported(struct gk20a *g)
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static bool gv11b_mm_is_bar1_supported(struct gk20a *g)
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{
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{
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return false;
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return false;
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@@ -61,6 +63,20 @@ void gv11b_mm_l2_flush(struct gk20a *g, bool invalidate)
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g->ops.mm.fb_flush(g);
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g->ops.mm.fb_flush(g);
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}
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}
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/*
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* On Volta the GPU determines whether to do L3 allocation for a mapping by
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* checking bit 36 of the phsyical address. So if a mapping should allocte lines
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* in the L3 this bit must be set.
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*/
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u64 gv11b_gpu_phys_addr(struct gk20a *g,
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struct nvgpu_gmmu_attrs *attrs, u64 phys)
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{
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if (attrs->t19x_attrs.l3_alloc)
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return phys | NVGPU_L3_ALLOC_BIT;
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return phys;
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}
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void gv11b_init_mm(struct gpu_ops *gops)
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void gv11b_init_mm(struct gpu_ops *gops)
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{
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{
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gp10b_init_mm(gops);
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gp10b_init_mm(gops);
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@@ -69,4 +85,5 @@ void gv11b_init_mm(struct gpu_ops *gops)
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gops->mm.init_mm_setup_hw = gk20a_init_mm_setup_hw;
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gops->mm.init_mm_setup_hw = gk20a_init_mm_setup_hw;
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gops->mm.mmu_fault_pending = gv11b_mm_mmu_fault_pending;
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gops->mm.mmu_fault_pending = gv11b_mm_mmu_fault_pending;
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gops->mm.l2_flush = gv11b_mm_l2_flush;
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gops->mm.l2_flush = gv11b_mm_l2_flush;
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gops->mm.gpu_phys_addr = gv11b_gpu_phys_addr;
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}
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}
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28
drivers/gpu/nvgpu/include/nvgpu/gmmu_t19x.h
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28
drivers/gpu/nvgpu/include/nvgpu/gmmu_t19x.h
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@@ -0,0 +1,28 @@
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/*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __NVGPU_GMMU_T19X_H__
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#define __NVGPU_GMMU_T19X_H__
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struct nvgpu_gmmu_attrs;
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struct nvgpu_gmmu_attrs_t19x {
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bool l3_alloc;
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};
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void nvgpu_gmmu_add_t19x_attrs(struct nvgpu_gmmu_attrs *attrs, u32 flags);
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#endif
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@@ -27,6 +27,12 @@
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#define NVGPU_GPU_ARCH_GV110 0x00000150
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#define NVGPU_GPU_ARCH_GV110 0x00000150
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#define NVGPU_GPU_IMPL_GV11B 0x0000000B
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#define NVGPU_GPU_IMPL_GV11B 0x0000000B
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/*
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* this flag is used in struct nvgpu_as_map_buffer_ex_args
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* to provide L3 cache allocation hint
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*/
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#define NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC (1 << 7)
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/* subcontexts are available */
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/* subcontexts are available */
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#define NVGPU_GPU_FLAGS_SUPPORT_TSG_SUBCONTEXTS (1ULL << 22)
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#define NVGPU_GPU_FLAGS_SUPPORT_TSG_SUBCONTEXTS (1ULL << 22)
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