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gpu: nvgpu: add missing busy calls for ctrl ioctls
The following ioctls:
- NVGPU_GPU_IOCTL_WAIT_FOR_PAUSE
- NVGPU_GPU_IOCTL_RESUME_FROM_PAUSE
- NVGPU_GPU_IOCTL_TRIGGER_SUSPEND
- NVGPU_GPU_IOCTL_CLEAR_SM_ERRORS
access hardware registers, so they should make sure that the gpu is
powered on first. Add gk20a_{busy,idle}() pairs for them.
Bug 1849661
Change-Id: I7deabf4a2c1c7d069a6134233f8e86df0a2722c8
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1461449
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
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mobile promotions
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afe12a49f7
@@ -393,16 +393,23 @@ static int nvgpu_gpu_ioctl_trigger_suspend(struct gk20a *g)
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{
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{
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int err;
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int err;
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err = gk20a_busy(g);
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if (err)
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return err;
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nvgpu_mutex_acquire(&g->dbg_sessions_lock);
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nvgpu_mutex_acquire(&g->dbg_sessions_lock);
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err = g->ops.gr.trigger_suspend(g);
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err = g->ops.gr.trigger_suspend(g);
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nvgpu_mutex_release(&g->dbg_sessions_lock);
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nvgpu_mutex_release(&g->dbg_sessions_lock);
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gk20a_idle(g);
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return err;
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return err;
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}
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}
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static int nvgpu_gpu_ioctl_wait_for_pause(struct gk20a *g,
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static int nvgpu_gpu_ioctl_wait_for_pause(struct gk20a *g,
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struct nvgpu_gpu_wait_pause_args *args)
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struct nvgpu_gpu_wait_pause_args *args)
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{
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{
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int err = 0;
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int err;
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struct warpstate *w_state;
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struct warpstate *w_state;
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u32 sm_count, size;
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u32 sm_count, size;
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@@ -412,6 +419,10 @@ static int nvgpu_gpu_ioctl_wait_for_pause(struct gk20a *g,
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if (!w_state)
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if (!w_state)
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return -ENOMEM;
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return -ENOMEM;
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err = gk20a_busy(g);
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if (err)
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goto out_free;
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nvgpu_mutex_acquire(&g->dbg_sessions_lock);
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nvgpu_mutex_acquire(&g->dbg_sessions_lock);
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g->ops.gr.wait_for_pause(g, w_state);
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g->ops.gr.wait_for_pause(g, w_state);
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@@ -422,23 +433,45 @@ static int nvgpu_gpu_ioctl_wait_for_pause(struct gk20a *g,
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}
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}
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nvgpu_mutex_release(&g->dbg_sessions_lock);
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nvgpu_mutex_release(&g->dbg_sessions_lock);
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gk20a_idle(g);
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out_free:
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nvgpu_kfree(g, w_state);
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nvgpu_kfree(g, w_state);
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return err;
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return err;
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}
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}
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static int nvgpu_gpu_ioctl_resume_from_pause(struct gk20a *g)
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static int nvgpu_gpu_ioctl_resume_from_pause(struct gk20a *g)
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{
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{
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int err = 0;
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int err;
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err = gk20a_busy(g);
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if (err)
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return err;
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nvgpu_mutex_acquire(&g->dbg_sessions_lock);
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nvgpu_mutex_acquire(&g->dbg_sessions_lock);
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err = g->ops.gr.resume_from_pause(g);
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err = g->ops.gr.resume_from_pause(g);
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nvgpu_mutex_release(&g->dbg_sessions_lock);
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nvgpu_mutex_release(&g->dbg_sessions_lock);
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gk20a_idle(g);
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return err;
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return err;
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}
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}
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static int nvgpu_gpu_ioctl_clear_sm_errors(struct gk20a *g)
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static int nvgpu_gpu_ioctl_clear_sm_errors(struct gk20a *g)
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{
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{
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return g->ops.gr.clear_sm_errors(g);
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int err;
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err = gk20a_busy(g);
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if (err)
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return err;
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err = g->ops.gr.clear_sm_errors(g);
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gk20a_idle(g);
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return err;
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}
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}
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static int nvgpu_gpu_ioctl_has_any_exception(
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static int nvgpu_gpu_ioctl_has_any_exception(
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