gpu: nvgpu: add intr_unit_bitmask i/p param for fb.intr.isr

tu104 onwards, fb interrupt status/enable/disable moved from
fb_niso_intr_* reg to fb_*vector* registers.
At the top level, fb interrupt status/enable/disable is done
using hub_intr bit in mc_intr registers.

Starting nvgpu-next, this has changed.

JIRA NVGPU-5032

Change-Id: Ib54170b055b83e2696312c811c2e3ba678749359
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2330867
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seema Khowala
2020-04-18 19:58:06 -07:00
committed by Alex Waterman
parent 470fe3a6d4
commit aff5497907
8 changed files with 26 additions and 25 deletions

View File

@@ -189,7 +189,7 @@ static u32 mock_ce_nonstall_isr(struct gk20a *g, u32 inst_id, u32 pri_base)
return u.ce_isr_return;
}
static void mock_fb_isr(struct gk20a *g)
static void mock_fb_isr(struct gk20a *g, u32 intr_unit_bitmask)
{
u.fb_isr = true;
}