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gpu: nvgpu: add intr_unit_bitmask i/p param for fb.intr.isr
tu104 onwards, fb interrupt status/enable/disable moved from fb_niso_intr_* reg to fb_*vector* registers. At the top level, fb interrupt status/enable/disable is done using hub_intr bit in mc_intr registers. Starting nvgpu-next, this has changed. JIRA NVGPU-5032 Change-Id: Ib54170b055b83e2696312c811c2e3ba678749359 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2330867 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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committed by
Alex Waterman
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470fe3a6d4
commit
aff5497907
@@ -189,7 +189,7 @@ static u32 mock_ce_nonstall_isr(struct gk20a *g, u32 inst_id, u32 pri_base)
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return u.ce_isr_return;
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}
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static void mock_fb_isr(struct gk20a *g)
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static void mock_fb_isr(struct gk20a *g, u32 intr_unit_bitmask)
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{
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u.fb_isr = true;
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}
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