From b05341134b7f86ba50a5207a30ba2dec3e4eed09 Mon Sep 17 00:00:00 2001
From: Dinesh T <dt@nvidia.com>
Date: Mon, 12 Dec 2022 14:53:42 +0000
Subject: [PATCH] gpu: nvgpu: Read device tree to get the supported syncpoints

The patch is adding a OS specific call to get the supported
syncpoints from the DT entry. The syncpoints is used to
initialize the number of supported channels while GPU
initialization.

The error path is taken care with the default value 256.

As device tree entries not available in upstream, the path
handled with the default value 256.

Change-Id: I9ac949d68a9f93f0e56fdbf8c8cd33b7dc903298
Signed-off-by: Dinesh T <dt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2826280
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
---
 drivers/gpu/nvgpu/os/linux/linux-channel.c | 52 ++++++++++++++++++----
 1 file changed, 44 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/nvgpu/os/linux/linux-channel.c b/drivers/gpu/nvgpu/os/linux/linux-channel.c
index 6c3131cb0..c9b85e068 100644
--- a/drivers/gpu/nvgpu/os/linux/linux-channel.c
+++ b/drivers/gpu/nvgpu/os/linux/linux-channel.c
@@ -25,6 +25,8 @@
 #include <nvgpu/dma.h>
 #include <nvgpu/fence.h>
 #include <nvgpu/grmgr.h>
+#include <nvgpu/dt.h>
+#include <nvgpu/soc.h>
 
 /*
  * This is required for nvgpu_vm_find_buf() which is used in the tracing
@@ -44,6 +46,8 @@
 #include <linux/uaccess.h>
 #include <linux/dma-buf.h>
 #include <linux/dma-direction.h>
+#include <linux/of.h>
+#include <linux/version.h>
 
 #include <nvgpu/trace.h>
 #include <uapi/linux/nvgpu.h>
@@ -52,7 +56,7 @@
 #include "sync_sema_dma.h"
 #include <nvgpu/linux/os_fence_dma.h>
 
-#define NUM_CHANNELS	512U
+#define NUM_CHANNELS	256U
 
 u32 nvgpu_submit_gpfifo_user_flags_to_common_flags(u32 user_flags)
 {
@@ -658,13 +662,45 @@ u32 nvgpu_channel_get_max_subctx_count(struct nvgpu_channel *ch)
 
 u32 nvgpu_channel_get_synpoints(struct gk20a *g)
 {
-	(void)g;
-	/*
-	 * The syncpoints should be queried from the DT entry.
-	 * Once support is added in the DT, this function will
-	 * read and return syncpoint entry present in the device tree.
-	 */
-	return NUM_CHANNELS;
+	if (nvgpu_is_hypervisor_mode(g)) {
+	#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0)
+		(void)g;
+		/*
+		 * The syncpoints should be queried from the DT entry.
+		 * Once support is added in the DT, this function will
+		 * read and return syncpoint entry present in the device tree.
+		 */
+		return NUM_CHANNELS;
+	#else
+		struct device_node *syncpt_node = NULL;
+		int val_read = 0U;
+		u32 val[2] = {0U, 0U};
+
+		(void)g;
+		syncpt_node = of_find_compatible_node(NULL, NULL,
+				"nvidia,tegra234-host1x-hv");
+		if (syncpt_node == NULL) {
+			return NUM_CHANNELS;
+		}
+
+		val_read = of_property_read_variable_u32_array(syncpt_node,
+			 "nvidia,gpu-syncpt-pool", val, 2, 2);
+		if ((val_read != 2) || (val_read < 0) || (val[1] == 0U)) {
+			return NUM_CHANNELS;
+		}
+
+		/*
+		 * As 0 is invalid syncpoint, HOST1x provides a syncpoint more than
+		 * expected. So subtract 1 from the length of the pool.
+		 */
+		return (val[1] - 1U);
+	#endif
+	} else {
+		/*
+		 * Return 512 channels for L4T and native platform.
+		 */
+		return 512U;
+	}
 }
 
 #ifdef CONFIG_DEBUG_FS