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gpu: nvgpu: Add dGPU clocks support

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JIRA DNVGPU-45

Change-Id: I237ce81e31b036c05c82d46eea8694ffe1c2e3df
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Signed-off-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1205849
(cherry picked from commit 9a4006f76b75a8ad525e7aa5ad1f609aaae49126)
Reviewed-on: http://git-master/r/1227256
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vijayakumar Subbu
2016-07-27 22:29:15 -07:00
committed by mobile promotions
parent 27b47b1969
commit b17d9708c9
33 changed files with 3575 additions and 36 deletions
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23
drivers/gpu/nvgpu/gk20a/pmu_api.h
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@@ -458,6 +458,29 @@ enum {
PMU_PG_ELPG_CMD_UNFREEZE,
};
enum {
PMU_PG_CMD_ID_ELPG_CMD = 0,
PMU_PG_CMD_ID_ENG_BUF_LOAD,
PMU_PG_CMD_ID_ENG_BUF_UNLOAD,
PMU_PG_CMD_ID_PG_STAT,
PMU_PG_CMD_ID_PG_LOG_INIT,
PMU_PG_CMD_ID_PG_LOG_FLUSH,
PMU_PG_CMD_ID_PG_PARAM,
PMU_PG_CMD_ID_ELPG_INIT,
PMU_PG_CMD_ID_ELPG_POLL_CTXSAVE,
PMU_PG_CMD_ID_ELPG_ABORT_POLL,
PMU_PG_CMD_ID_ELPG_PWR_UP,
PMU_PG_CMD_ID_ELPG_DISALLOW,
PMU_PG_CMD_ID_ELPG_ALLOW,
PMU_PG_CMD_ID_AP,
RM_PMU_PG_CMD_ID_PSI,
RM_PMU_PG_CMD_ID_CG,
PMU_PG_CMD_ID_ZBC_TABLE_UPDATE,
PMU_PG_CMD_ID_PWR_RAIL_GATE_DISABLE = 0x20,
PMU_PG_CMD_ID_PWR_RAIL_GATE_ENABLE,
PMU_PG_CMD_ID_PWR_RAIL_SMU_MSG_DISABLE
};
struct pmu_pg_cmd_elpg_cmd {
u8 cmd_type;
u8 engine_id;