gpu: nvgpu: Add device debug printing

Add some prints that can be enabled by the nvgpu_info() infrastructure.
These prints dump device information for devices as they get parsed.

JIRA NVGPU-5420

Change-Id: Iaf43b9ee0ff5fb0a2e93407315e6827cba30332f
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2368311
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Alex Waterman
2020-06-29 11:53:51 -05:00
parent 1387a16ef2
commit b21116485f
2 changed files with 61 additions and 2 deletions

View File

@@ -27,6 +27,11 @@
#include <nvgpu/string.h>
#include <nvgpu/log.h>
#define device_dbg(g, fmt, args...) \
do { \
nvgpu_log(g, gpu_dbg_device, fmt, ##args); \
} while (0)
static inline struct nvgpu_device *
nvgpu_device_from_dev_list_node(struct nvgpu_list_node *node)
{
@@ -35,6 +40,47 @@ nvgpu_device_from_dev_list_node(struct nvgpu_list_node *node)
dev_list_node));
};
static inline const char *nvgpu_device_type_to_str(const struct nvgpu_device *dev)
{
const char *str = "Unknown";
switch (dev->type) {
case NVGPU_DEVTYPE_GRAPHICS:
str = "GFX";
break;
case NVGPU_DEVTYPE_COPY0:
str = "CE0";
break;
case NVGPU_DEVTYPE_COPY1:
str = "CE1";
break;
case NVGPU_DEVTYPE_COPY2:
str = "CE2";
break;
case NVGPU_DEVTYPE_IOCTRL:
str = "IOCTRL";
break;
case NVGPU_DEVTYPE_LCE:
str = "LCE";
break;
default:
break;
}
return str;
}
void nvgpu_device_dump_dev(struct gk20a *g, const struct nvgpu_device *dev)
{
device_dbg(g, "Device %s:%d",
nvgpu_device_type_to_str(dev), dev->inst_id);
device_dbg(g, " EngineID: %2u FaultID: %2u",
dev->engine_id, dev->fault_id);
device_dbg(g, " RunlistID: %2u IntrID: %2u ResetID: %u",
dev->runlist_id, dev->intr_id, dev->reset_id);
device_dbg(g, " PRI Base: 0x%x", dev->pri_base);
}
/*
* Faciliate the parsing of the TOP array describing the devices present in the
* GPU.
@@ -52,7 +98,7 @@ static int nvgpu_device_parse_hw_table(struct gk20a *g)
break;
}
nvgpu_log(g, gpu_dbg_info, "Parsed one device: %u", dev->type);
nvgpu_device_dump_dev(g, dev);
/*
* Otherwise we have a device - let's add it to the right device
@@ -83,7 +129,7 @@ int nvgpu_device_init(struct gk20a *g)
return 0;
}
nvgpu_log(g, gpu_dbg_info, "Initialization GPU device list");
device_dbg(g, "Initializating GPU device list");
g->devs = nvgpu_kzalloc(g, sizeof(*g->devs));
if (g->devs == NULL) {