diff --git a/arch/nvgpu-common.yaml b/arch/nvgpu-common.yaml
index 4f7886e34..35e6f518b 100644
--- a/arch/nvgpu-common.yaml
+++ b/arch/nvgpu-common.yaml
@@ -646,7 +646,6 @@ pmu:
                  include/nvgpu/pmu/pmuif/ctrlclk.h,
                  include/nvgpu/pmu/pmuif/ctrlclkavfs.h,
                  include/nvgpu/pmu/pmuif/ctrlpmgr.h,
-                 include/nvgpu/pmu/pmuif/ctrlvolt.h,
                  include/nvgpu/pmu/pmuif/acr.h,
                  include/nvgpu/pmu/pmuif/ap.h,
                  include/nvgpu/pmu/pmuif/cmn.h,
@@ -659,7 +658,6 @@ pmu:
                  include/nvgpu/pmu/pmuif/clk.h,
                  include/nvgpu/pmu/pmuif/pmgr.h,
                  include/nvgpu/pmu/pmuif/seq.h,
-                 include/nvgpu/pmu/pmuif/volt.h,
                  include/nvgpu/pmu/pmuif/rpc.h,
                  include/nvgpu/pmu/pmuif/nvgpu_cmdif.h ]
     boardobj:
@@ -914,6 +912,7 @@ pmu:
                  common/pmu/volt/volt_dev.h,
                  common/pmu/volt/volt_policy.h,
                  common/pmu/volt/volt_rail.h,
+                 common/pmu/volt/ucode_volt_inf.h,
                  include/nvgpu/pmu/volt.h ]
 
 sec2:
diff --git a/drivers/gpu/nvgpu/common/pmu/clk/clk.c b/drivers/gpu/nvgpu/common/pmu/clk/clk.c
index 3f162b132..c7c8a6420 100644
--- a/drivers/gpu/nvgpu/common/pmu/clk/clk.c
+++ b/drivers/gpu/nvgpu/common/pmu/clk/clk.c
@@ -24,7 +24,6 @@
 #include <nvgpu/pmu/pmuif/nvgpu_cmdif.h>
 #include <nvgpu/gk20a.h>
 #include <nvgpu/pmu/pmuif/ctrlclk.h>
-#include <nvgpu/pmu/pmuif/ctrlvolt.h>
 #include <nvgpu/bug.h>
 #include <nvgpu/pmu/volt.h>
 #include <nvgpu/pmu/perf.h>
diff --git a/drivers/gpu/nvgpu/common/pmu/clk/clk_domain.c b/drivers/gpu/nvgpu/common/pmu/clk/clk_domain.c
index e6c40a47e..a1721b8ba 100644
--- a/drivers/gpu/nvgpu/common/pmu/clk/clk_domain.c
+++ b/drivers/gpu/nvgpu/common/pmu/clk/clk_domain.c
@@ -32,7 +32,6 @@
 #include <nvgpu/pmu/clk/clk_vf_point.h>
 #include <nvgpu/pmu/perf.h>
 #include <nvgpu/string.h>
-#include <nvgpu/pmu/pmuif/ctrlvolt.h>
 #include <nvgpu/pmu/volt.h>
 #include <nvgpu/pmu/clk/clk.h>
 #include <nvgpu/pmu/cmd.h>
diff --git a/drivers/gpu/nvgpu/common/pmu/clk/clk_fll.c b/drivers/gpu/nvgpu/common/pmu/clk/clk_fll.c
index 7ed560816..fa3fcf916 100644
--- a/drivers/gpu/nvgpu/common/pmu/clk/clk_fll.c
+++ b/drivers/gpu/nvgpu/common/pmu/clk/clk_fll.c
@@ -28,7 +28,6 @@
 #include <nvgpu/boardobjgrpmask.h>
 #include <nvgpu/string.h>
 #include <nvgpu/pmu/pmuif/ctrlclk.h>
-#include <nvgpu/pmu/pmuif/ctrlvolt.h>
 #include <nvgpu/pmu/clk/clk.h>
 #include <nvgpu/pmu/clk/clk_fll.h>
 #include <nvgpu/pmu/clk/clk_vin.h>
diff --git a/drivers/gpu/nvgpu/common/pmu/clk/clk_prog.c b/drivers/gpu/nvgpu/common/pmu/clk/clk_prog.c
index 0bf76a094..407824303 100644
--- a/drivers/gpu/nvgpu/common/pmu/clk/clk_prog.c
+++ b/drivers/gpu/nvgpu/common/pmu/clk/clk_prog.c
@@ -29,7 +29,6 @@
 #include <nvgpu/pmu/boardobjgrp_classes.h>
 #include <nvgpu/string.h>
 #include <nvgpu/pmu/pmuif/ctrlclk.h>
-#include <nvgpu/pmu/pmuif/ctrlvolt.h>
 #include <nvgpu/pmu/clk/clk.h>
 #include <nvgpu/pmu/clk/clk_vf_point.h>
 
diff --git a/drivers/gpu/nvgpu/common/pmu/clk/clk_vf_point.c b/drivers/gpu/nvgpu/common/pmu/clk/clk_vf_point.c
index 44cc905d5..472ad6f12 100644
--- a/drivers/gpu/nvgpu/common/pmu/clk/clk_vf_point.c
+++ b/drivers/gpu/nvgpu/common/pmu/clk/clk_vf_point.c
@@ -27,7 +27,6 @@
 #include <nvgpu/pmu/boardobjgrp_classes.h>
 #include <nvgpu/string.h>
 #include <nvgpu/pmu/pmuif/ctrlclk.h>
-#include <nvgpu/pmu/pmuif/ctrlvolt.h>
 #include <nvgpu/timers.h>
 #include <nvgpu/clk_arb.h>
 #include <nvgpu/pmu/volt.h>
diff --git a/drivers/gpu/nvgpu/common/pmu/clk/clk_vin.c b/drivers/gpu/nvgpu/common/pmu/clk/clk_vin.c
index 14966368b..67daf58d3 100644
--- a/drivers/gpu/nvgpu/common/pmu/clk/clk_vin.c
+++ b/drivers/gpu/nvgpu/common/pmu/clk/clk_vin.c
@@ -29,7 +29,6 @@
 #include <nvgpu/boardobjgrp_e32.h>
 #include <nvgpu/pmu/boardobjgrp_classes.h>
 #include <nvgpu/string.h>
-#include <nvgpu/pmu/pmuif/ctrlvolt.h>
 #include <nvgpu/pmu/clk/clk.h>
 #include <nvgpu/pmu/cmd.h>
 #include <nvgpu/pmu/volt.h>
diff --git a/drivers/gpu/nvgpu/common/pmu/super_surface/super_surface_priv.h b/drivers/gpu/nvgpu/common/pmu/super_surface/super_surface_priv.h
index 255cb1152..97b45c500 100644
--- a/drivers/gpu/nvgpu/common/pmu/super_surface/super_surface_priv.h
+++ b/drivers/gpu/nvgpu/common/pmu/super_surface/super_surface_priv.h
@@ -25,7 +25,6 @@
 
 #include <nvgpu/pmu/pmuif/nvgpu_cmdif.h>
 #include <nvgpu/pmu/pmuif/boardobj.h>
-#include <nvgpu/pmu/pmuif/volt.h>
 #include <nvgpu/pmu/pmuif/clk.h>
 #include <nvgpu/pmu/pmuif/cmn.h>
 #include <nvgpu/flcnif_cmn.h>
@@ -108,17 +107,6 @@ struct nv_pmu_super_surface {
 		 * member present above to know the offset of
 		 * required boardobj from super surface in nvgpu
 		 */
-		struct {
-			struct nv_pmu_volt_volt_device_boardobj_grp_set
-				volt_device_grp_set;
-			struct nv_pmu_volt_volt_policy_boardobj_grp_set
-				volt_policy_grp_set;
-			struct nv_pmu_volt_volt_rail_boardobj_grp_set
-				volt_rail_grp_set;
-
-			struct nv_pmu_volt_volt_rail_boardobj_grp_get_status
-				volt_rail_grp_get_status;
-		} volt;
 		struct  {
 			struct nv_pmu_clk_clk_vin_device_boardobj_grp_set
 				clk_vin_device_grp_set;
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/volt.h b/drivers/gpu/nvgpu/common/pmu/volt/ucode_volt_inf.h
similarity index 72%
rename from drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/volt.h
rename to drivers/gpu/nvgpu/common/pmu/volt/ucode_volt_inf.h
index 58cc9ba38..320df6cbb 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/volt.h
+++ b/drivers/gpu/nvgpu/common/pmu/volt/ucode_volt_inf.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -24,10 +24,96 @@
 
 #include <nvgpu/flcnif_cmn.h>
 
-#include "boardobj.h"
-#include "ctrlvolt.h"
+#include <nvgpu/pmu/pmuif/boardobj.h>
+#include <nvgpu/pmu/pmuif/ctrlboardobj.h>
 
-#define NV_PMU_VOLT_VALUE_0V_IN_UV	(0U)
+#define CTRL_VOLT_VOLT_RAIL_MAX_RAILS	\
+	CTRL_BOARDOBJGRP_E32_MAX_OBJECTS
+
+#define CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES	0x04U
+#define CTRL_VOLT_VOLT_DEV_VID_VSEL_MAX_ENTRIES	0x8U
+#define CTRL_VOLT_DOMAIN_INVALID				0x00U
+#define CLK_PROG_VFE_ENTRY_SRAM					0x01U
+#define NV_PMU_VOLT_VALUE_0V_IN_UV				0U
+
+/*
+ * Macros for Voltage Domain HAL.
+ */
+#define CTRL_VOLT_DOMAIN_HAL_GP10X_SINGLE_RAIL 0x00U
+
+/*!
+ * Special value corresponding to an invalid Voltage Rail Index.
+ */
+#define CTRL_VOLT_RAIL_INDEX_INVALID	\
+			CTRL_BOARDOBJ_IDX_INVALID
+
+/*!
+ * Special value corresponding to an invalid Voltage Device Index.
+ */
+#define CTRL_VOLT_DEVICE_INDEX_INVALID	\
+			CTRL_BOARDOBJ_IDX_INVALID
+
+/*!
+ * Special value corresponding to an invalid Voltage Policy Index.
+ */
+#define CTRL_VOLT_POLICY_INDEX_INVALID	\
+			CTRL_BOARDOBJ_IDX_INVALID
+
+enum nv_pmu_pmgr_pwm_source {
+	NV_PMU_PMGR_PWM_SOURCE_INVALID = 0,
+	NV_PMU_PMGR_PWM_SOURCE_THERM_VID_PWM_0 = 4,
+	NV_PMU_PMGR_PWM_SOURCE_THERM_IPC_VMIN_VID_PWM_0 = 13U,
+};
+
+/*!
+ * Macros for Voltage Device Types.
+ */
+#define CTRL_VOLT_DEVICE_TYPE_INVALID		0x00U
+#define CTRL_VOLT_DEVICE_TYPE_PWM		0x03U
+
+/*
+ * Macros for Volt Device Operation types.
+ */
+#define CTRL_VOLT_DEVICE_OPERATION_TYPE_INVALID			0x00U
+#define CTRL_VOLT_DEVICE_OPERATION_TYPE_DEFAULT			0x01U
+#define CTRL_VOLT_VOLT_DEVICE_OPERATION_TYPE_IPC_VMIN		0x04U
+
+/*!
+ * Macros for Voltage Domains.
+ */
+#define CTRL_VOLT_DOMAIN_INVALID	0x00U
+#define CTRL_VOLT_DOMAIN_LOGIC		0x01U
+#define CTRL_VOLT_DOMAIN_SRAM		0x02U
+
+/*!
+ * Macros for Volt Policy types.
+ *
+ * Virtual VOLT_POLICY types are indexed starting from 0xFF.
+ */
+#define CTRL_VOLT_POLICY_TYPE_INVALID			0x00U
+#define CTRL_VOLT_POLICY_TYPE_SINGLE_RAIL		0x01U
+#define CTRL_VOLT_POLICY_TYPE_SR_MULTI_STEP		0x02U
+#define CTRL_VOLT_POLICY_TYPE_SR_SINGLE_STEP		0x03U
+#define CTRL_VOLT_POLICY_TYPE_SINGLE_RAIL_MULTI_STEP	0x04U
+#define CTRL_VOLT_POLICY_TYPE_SPLIT_RAIL		0xFEU
+#define CTRL_VOLT_POLICY_TYPE_UNKNOWN			0xFFU
+
+/*!
+ * Macros for Volt Policy Client types.
+ */
+#define CTRL_VOLT_POLICY_CLIENT_INVALID			0x00U
+#define CTRL_VOLT_POLICY_CLIENT_PERF_CORE_VF_SEQ	0x01U
+
+struct ctrl_volt_volt_rail_list_item {
+	u8 rail_idx;
+	u32 voltage_uv;
+};
+
+struct ctrl_volt_volt_rail_list {
+	u8    num_rails;
+	struct ctrl_volt_volt_rail_list_item
+		rails[CTRL_VOLT_VOLT_RAIL_MAX_RAILS];
+};
 
 struct nv_pmu_volt_volt_rail_boardobjgrp_set_header {
 	struct nv_pmu_boardobjgrp_e32 super;
diff --git a/drivers/gpu/nvgpu/common/pmu/volt/volt_dev.c b/drivers/gpu/nvgpu/common/pmu/volt/volt_dev.c
index cbf62e82d..5e5284202 100644
--- a/drivers/gpu/nvgpu/common/pmu/volt/volt_dev.c
+++ b/drivers/gpu/nvgpu/common/pmu/volt/volt_dev.c
@@ -29,10 +29,10 @@
 #include <nvgpu/boardobjgrp_e32.h>
 #include <nvgpu/pmu/boardobjgrp_classes.h>
 #include <nvgpu/string.h>
-#include <nvgpu/pmu/pmuif/ctrlvolt.h>
 #include <nvgpu/pmu/perf.h>
 #include <nvgpu/pmu/volt.h>
 
+#include "ucode_volt_inf.h"
 #include "volt_dev.h"
 #include "volt_rail.h"
 
diff --git a/drivers/gpu/nvgpu/common/pmu/volt/volt_dev.h b/drivers/gpu/nvgpu/common/pmu/volt/volt_dev.h
index 3a84a9534..ebc7ff631 100644
--- a/drivers/gpu/nvgpu/common/pmu/volt/volt_dev.h
+++ b/drivers/gpu/nvgpu/common/pmu/volt/volt_dev.h
@@ -25,7 +25,8 @@
 
 #include <nvgpu/boardobj.h>
 #include <nvgpu/boardobjgrp.h>
-#include <nvgpu/pmu/pmuif/ctrlvolt.h>
+
+#include "ucode_volt_inf.h"
 
 #define VOLTAGE_TABLE_MAX_ENTRIES_ONE	1U
 #define VOLTAGE_TABLE_MAX_ENTRIES	256U
diff --git a/drivers/gpu/nvgpu/common/pmu/volt/volt_policy.c b/drivers/gpu/nvgpu/common/pmu/volt/volt_policy.c
index 21d157373..f51c85c96 100644
--- a/drivers/gpu/nvgpu/common/pmu/volt/volt_policy.c
+++ b/drivers/gpu/nvgpu/common/pmu/volt/volt_policy.c
@@ -26,9 +26,9 @@
 #include <nvgpu/boardobjgrp_e32.h>
 #include <nvgpu/pmu/boardobjgrp_classes.h>
 #include <nvgpu/string.h>
-#include <nvgpu/pmu/pmuif/ctrlvolt.h>
 #include <nvgpu/pmu/perf.h>
 
+#include "ucode_volt_inf.h"
 #include "volt_policy.h"
 
 static int volt_policy_pmu_data_init_super(struct gk20a *g,
diff --git a/drivers/gpu/nvgpu/common/pmu/volt/volt_rail.c b/drivers/gpu/nvgpu/common/pmu/volt/volt_rail.c
index 236fc0519..d5f34ef54 100644
--- a/drivers/gpu/nvgpu/common/pmu/volt/volt_rail.c
+++ b/drivers/gpu/nvgpu/common/pmu/volt/volt_rail.c
@@ -26,10 +26,10 @@
 #include <nvgpu/boardobjgrp_e32.h>
 #include <nvgpu/pmu/boardobjgrp_classes.h>
 #include <nvgpu/string.h>
-#include <nvgpu/pmu/pmuif/ctrlvolt.h>
 #include <nvgpu/pmu/perf.h>
 #include <nvgpu/pmu/volt.h>
 
+#include "ucode_volt_inf.h"
 #include "volt_rail.h"
 
 #define NV_PMU_PERF_RPC_VFE_EQU_MONITOR_COUNT_MAX                            16U
diff --git a/drivers/gpu/nvgpu/hal/clk/clk_tu104.c b/drivers/gpu/nvgpu/hal/clk/clk_tu104.c
index 0352abcea..e6c8cc78d 100644
--- a/drivers/gpu/nvgpu/hal/clk/clk_tu104.c
+++ b/drivers/gpu/nvgpu/hal/clk/clk_tu104.c
@@ -38,6 +38,7 @@
 #include <nvgpu/clk_arb.h>
 #include <nvgpu/pmu/clk/clk.h>
 #include <nvgpu/pmu/clk/clk_domain.h>
+#include <nvgpu/pmu/volt.h>
 #include <nvgpu/hw/tu104/hw_trim_tu104.h>
 
 #include "clk_tu104.h"
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu/cmd.h b/drivers/gpu/nvgpu/include/nvgpu/pmu/cmd.h
index e9f7099ca..da6344587 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/pmu/cmd.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/pmu/cmd.h
@@ -27,7 +27,6 @@
 #include <nvgpu/pmu/pmuif/pg.h>
 #include <nvgpu/pmu/pmuif/acr.h>
 #include <nvgpu/pmu/pmuif/boardobj.h>
-#include <nvgpu/pmu/pmuif/volt.h>
 #include <nvgpu/pmu/pmuif/clk.h>
 #include <nvgpu/pmu/pmuif/pmgr.h>
 #include <nvgpu/pmu/pmuif/rpc.h>
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu/msg.h b/drivers/gpu/nvgpu/include/nvgpu/pmu/msg.h
index c19b5acea..ee3c97d7c 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/pmu/msg.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/pmu/msg.h
@@ -31,7 +31,6 @@
 #include <nvgpu/pmu/pmuif/boardobj.h>
 #include <nvgpu/pmu/pmuif/clk.h>
 #include <nvgpu/pmu/pmuif/pmgr.h>
-#include <nvgpu/pmu/pmuif/volt.h>
 
 /* GPU ID */
 #define PMU_SHA1_GID_SIGNATURE		0xA7C66AD2U
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/clk.h b/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/clk.h
index 8b85f1901..a872e246a 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/clk.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/clk.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -24,12 +24,11 @@
 #define NVGPU_PMUIF_CLK_H
 
 #include <nvgpu/flcnif_cmn.h>
+#include <nvgpu/pmu/volt.h>
 
 #include "ctrlboardobj.h"
-#include "ctrlvolt.h"
 #include "ctrlclk.h"
 #include "boardobj.h"
-#include "volt.h"
 
 /*
  *  Try to get gpc2clk, mclk, sys2clk, xbar2clk work for Pascal
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/ctrlclk.h b/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/ctrlclk.h
index f7e76d0f5..1ea1afb09 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/ctrlclk.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/ctrlclk.h
@@ -1,7 +1,7 @@
 /*
  * general p state infrastructure
  *
- * Copyright (c) 2018-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2018-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -26,7 +26,6 @@
 
 #include "ctrlboardobj.h"
 #include "ctrlclkavfs.h"
-#include "ctrlvolt.h"
 
 #define CTRL_CLK_CLK_DELTA_MAX_VOLT_RAILS 4U
 
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/ctrlvolt.h b/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/ctrlvolt.h
deleted file mode 100644
index 43fbe9194..000000000
--- a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/ctrlvolt.h
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- * general p state infrastructure
- *
- * Copyright (c) 2016-2019, NVIDIA CORPORATION.  All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-#ifndef NVGPU_PMUIF_CTRLVOLT_H
-#define NVGPU_PMUIF_CTRLVOLT_H
-
-#define CTRL_VOLT_VOLT_RAIL_MAX_RAILS	\
-	CTRL_BOARDOBJGRP_E32_MAX_OBJECTS
-
-#include "ctrlboardobj.h"
-
-#define CTRL_VOLT_VOLT_RAIL_CLIENT_MAX_RAILS	0x04U
-#define CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES	0x04U
-#define CTRL_VOLT_VOLT_DEV_VID_VSEL_MAX_ENTRIES	(8U)
-#define CTRL_VOLT_DOMAIN_INVALID		0x00U
-#define CTRL_VOLT_DOMAIN_LOGIC			0x01U
-#define CLK_PROG_VFE_ENTRY_LOGIC		0x00U
-#define CLK_PROG_VFE_ENTRY_SRAM			0x01U
-
-/*
- * Macros for Voltage Domain HAL.
- */
-#define CTRL_VOLT_DOMAIN_HAL_GP10X_SINGLE_RAIL 0x00U
-
-/*!
- * Special value corresponding to an invalid Voltage Rail Index.
- */
-#define CTRL_VOLT_RAIL_INDEX_INVALID	\
-			CTRL_BOARDOBJ_IDX_INVALID
-
-/*!
- * Special value corresponding to an invalid Voltage Device Index.
- */
-#define CTRL_VOLT_DEVICE_INDEX_INVALID	\
-			CTRL_BOARDOBJ_IDX_INVALID
-
-/*!
- * Special value corresponding to an invalid Voltage Policy Index.
- */
-#define CTRL_VOLT_POLICY_INDEX_INVALID	\
-			CTRL_BOARDOBJ_IDX_INVALID
-
-enum nv_pmu_pmgr_pwm_source {
-	NV_PMU_PMGR_PWM_SOURCE_INVALID = 0,
-	NV_PMU_PMGR_PWM_SOURCE_THERM_VID_PWM_0 = 4,
-	NV_PMU_PMGR_PWM_SOURCE_THERM_IPC_VMIN_VID_PWM_0 = 13U,
-};
-
-/*!
- * Macros for Voltage Device Types.
- */
-#define CTRL_VOLT_DEVICE_TYPE_INVALID		0x00U
-#define CTRL_VOLT_DEVICE_TYPE_PWM		0x03U
-
-/*
- * Macros for Volt Device Operation types.
- */
-#define CTRL_VOLT_DEVICE_OPERATION_TYPE_INVALID			0x00U
-#define CTRL_VOLT_DEVICE_OPERATION_TYPE_DEFAULT			0x01U
-#define CTRL_VOLT_VOLT_DEVICE_OPERATION_TYPE_IPC_VMIN		0x04U
-
-/*!
- * Macros for Voltage Domains.
- */
-#define CTRL_VOLT_DOMAIN_INVALID	0x00U
-#define CTRL_VOLT_DOMAIN_LOGIC		0x01U
-#define CTRL_VOLT_DOMAIN_SRAM		0x02U
-
-/*!
- * Macros for Volt Policy types.
- *
- * Virtual VOLT_POLICY types are indexed starting from 0xFF.
- */
-#define CTRL_VOLT_POLICY_TYPE_INVALID			0x00U
-#define CTRL_VOLT_POLICY_TYPE_SINGLE_RAIL		0x01U
-#define CTRL_VOLT_POLICY_TYPE_SR_MULTI_STEP		0x02U
-#define CTRL_VOLT_POLICY_TYPE_SR_SINGLE_STEP		0x03U
-#define CTRL_VOLT_POLICY_TYPE_SINGLE_RAIL_MULTI_STEP	0x04U
-#define CTRL_VOLT_POLICY_TYPE_SPLIT_RAIL		0xFEU
-#define CTRL_VOLT_POLICY_TYPE_UNKNOWN			0xFFU
-
-/*!
- * Macros for Volt Policy Client types.
- */
-#define CTRL_VOLT_POLICY_CLIENT_INVALID			0x00U
-#define CTRL_VOLT_POLICY_CLIENT_PERF_CORE_VF_SEQ	0x01U
-
-struct ctrl_volt_volt_rail_list_item {
-	u8 rail_idx;
-	u32 voltage_uv;
-};
-
-struct ctrl_volt_volt_rail_list {
-	u8    num_rails;
-	struct ctrl_volt_volt_rail_list_item
-		rails[CTRL_VOLT_VOLT_RAIL_MAX_RAILS];
-};
-
-struct ctrl_volt_volt_rail_list_item_v1 {
-	u8 rail_idx;
-	u32 voltage_uv;
-	u32 voltage_min_noise_unaware_uv;
-	u32 voltage_offset_uV[2];
-};
-
-struct ctrl_volt_volt_rail_list_v1 {
-	u8    num_rails;
-	struct ctrl_volt_volt_rail_list_item_v1
-		rails[CTRL_VOLT_VOLT_RAIL_CLIENT_MAX_RAILS];
-};
-
-#endif /* NVGPU_PMUIF_CTRLVOLT_H */
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu/volt.h b/drivers/gpu/nvgpu/include/nvgpu/pmu/volt.h
index e39a0dbeb..6b3b865c7 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/pmu/volt.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/pmu/volt.h
@@ -28,6 +28,9 @@
 
 struct gk20a;
 #define CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES	0x04U
+#define CTRL_VOLT_DOMAIN_LOGIC			0x01U
+#define CLK_PROG_VFE_ENTRY_LOGIC		0x00U
+#define CTRL_VOLT_VOLT_RAIL_CLIENT_MAX_RAILS	0x04U
 
 #define VOLT_GET_VOLT_RAIL(pvolt, rail_idx)	\
 	((struct voltage_rail *)BOARDOBJGRP_OBJ_GET_BY_IDX( \
@@ -66,6 +69,18 @@ struct nvgpu_pmu_volt {
 	struct voltage_device_metadata volt_dev_metadata;
 	struct voltage_policy_metadata volt_policy_metadata;
 };
+struct ctrl_volt_volt_rail_list_item_v1 {
+	u8 rail_idx;
+	u32 voltage_uv;
+	u32 voltage_min_noise_unaware_uv;
+	u32 voltage_offset_uV[2];
+};
+
+struct ctrl_volt_volt_rail_list_v1 {
+	u8    num_rails;
+	struct ctrl_volt_volt_rail_list_item_v1
+		rails[CTRL_VOLT_VOLT_RAIL_CLIENT_MAX_RAILS];
+};
 
 u8 nvgpu_volt_rail_volt_domain_convert_to_idx(struct gk20a *g, u8 volt_domain);
 int nvgpu_volt_get_vmin_vmax_ps35(struct gk20a *g, u32 *vmin_uv, u32 *vmax_uv);
diff --git a/drivers/gpu/nvgpu/os/linux/debug_clk_tu104.c b/drivers/gpu/nvgpu/os/linux/debug_clk_tu104.c
index 110e2de04..6b90717a5 100644
--- a/drivers/gpu/nvgpu/os/linux/debug_clk_tu104.c
+++ b/drivers/gpu/nvgpu/os/linux/debug_clk_tu104.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019, NVIDIA Corporation. All rights reserved.
+ * Copyright (c) 2018-2020, NVIDIA Corporation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -26,6 +26,7 @@
 #include <nvgpu/pmu/clk/clk_vf_point.h>
 #include <nvgpu/pmu/clk/clk_fll.h>
 #include <nvgpu/pmu/clk/clk.h>
+#include <nvgpu/pmu/volt.h>
 
 #include "hal/clk/clk_tu104.h"