diff --git a/drivers/gpu/nvgpu/include/nvgpu/posix/probe.h b/drivers/gpu/nvgpu/include/nvgpu/posix/probe.h
index 71a71ac06..3b2bc0111 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/posix/probe.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/posix/probe.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2021, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2018-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -26,6 +26,8 @@
 /*
  * In the unit test FW the POSIX code is expecting a gv11b at the moment.
  */
+#define NV_PMC_BOOT_0_ARCHITECTURE_GA100	(0x00000017 << \
+						NVGPU_GPU_ARCHITECTURE_SHIFT)
 #define NV_PMC_BOOT_0_ARCHITECTURE_GV110	(0x00000015 << \
 						NVGPU_GPU_ARCHITECTURE_SHIFT)
 #define NV_PMC_BOOT_0_IMPLEMENTATION_B		0xB
diff --git a/drivers/gpu/nvgpu/os/posix/firmware.c b/drivers/gpu/nvgpu/os/posix/firmware.c
index ea6cd8719..aa5a63e47 100644
--- a/drivers/gpu/nvgpu/os/posix/firmware.c
+++ b/drivers/gpu/nvgpu/os/posix/firmware.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2022, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2018-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -32,9 +32,11 @@
 #define FW_MAX_PATH_SIZE 2048U
 
 #if defined(__QNX__)
-#define NVGPU_UNITTEST_UCODE_PATH "/gv11b/"
+#define NVGPU_UNITTEST_UCODE_PATH_GV11B "/gv11b/"
+#define NVGPU_UNITTEST_UCODE_PATH_GA10B "/ga10b/"
 #else
-#define NVGPU_UNITTEST_UCODE_PATH "/firmware/gv11b/"
+#define NVGPU_UNITTEST_UCODE_PATH_GV11B "/firmware/gv11b/"
+#define NVGPU_UNITTEST_UCODE_PATH_GA10B "/firmware/ga10b/"
 #endif
 
 static int nvgpu_ucode_load(struct gk20a *g, const char *path,
@@ -130,14 +132,24 @@ struct nvgpu_firmware *nvgpu_request_firmware(struct gk20a *g,
 
 	full_path_len = strlen(full_path);
 	full_path_len += strlen(fw_name);
-	full_path_len += strlen(NVGPU_UNITTEST_UCODE_PATH);
+
+	if (strcmp(g->name, "ga10b") == 0) {
+		full_path_len += strlen(NVGPU_UNITTEST_UCODE_PATH_GA10B);
+	} else {
+		full_path_len += strlen(NVGPU_UNITTEST_UCODE_PATH_GV11B);
+	}
+
 	if (full_path_len >=  FW_MAX_PATH_SIZE) {
 		nvgpu_err(g, "Invalid MAX_PATH_SIZE %lu %u", full_path_len,
 			FW_MAX_PATH_SIZE);
 		goto err;
 	}
 
-	strcat(full_path, NVGPU_UNITTEST_UCODE_PATH);
+	if (strcmp(g->name, "ga10b") == 0) {
+		strcat(full_path, NVGPU_UNITTEST_UCODE_PATH_GA10B);
+	} else {
+		strcat(full_path, NVGPU_UNITTEST_UCODE_PATH_GV11B);
+	}
 	strcat(full_path, fw_name);
 
 	fw = nvgpu_kzalloc(g, sizeof(*fw));
diff --git a/userspace/units/acr/nvgpu-acr.c b/userspace/units/acr/nvgpu-acr.c
index e2980931a..80a35d8bf 100644
--- a/userspace/units/acr/nvgpu-acr.c
+++ b/userspace/units/acr/nvgpu-acr.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2022, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -205,9 +205,14 @@ static int init_acr_falcon_test_env(struct unit_module *m, struct gk20a *g)
 	}
 
 	/*
-	 * HAL init parameters for gv11b
+	 * HAL init parameters for gv11b and ga10b
 	 */
-	g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+
+	if (strcmp(g->name, "ga10b") == 0) {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GA100;
+	} else {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	}
 	g->params.gpu_impl = NV_PMC_BOOT_0_IMPLEMENTATION_B;
 
 	/*
@@ -653,7 +658,11 @@ int test_acr_construct_execute(struct unit_module *m,
 	 *
 	 * HAL init parameters for gv11b: Correct chip id
 	 */
-	g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	if (strcmp(g->name, "ga10b") == 0) {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GA100;
+	} else {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	}
 	g->params.gpu_impl = NV_PMC_BOOT_0_IMPLEMENTATION_B;
 
 	nvgpu_posix_enable_fault_injection(kmem_fi, true, 0);
@@ -813,7 +822,11 @@ int test_acr_prepare_ucode_blob(struct unit_module *m,
 	 *
 	 * HAL init parameters for gv11b: Correct chip id
 	 */
-	g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	if (strcmp(g->name, "ga10b") == 0) {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GA100;
+	} else {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	}
 	g->params.gpu_impl = NV_PMC_BOOT_0_IMPLEMENTATION_B;
 
 	nvgpu_posix_enable_fault_injection(kmem_fi, true, 0);
@@ -876,7 +889,11 @@ int test_acr_prepare_ucode_blob(struct unit_module *m,
 	/*
 	 * set back the valid GPU version
 	 */
-	g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	if (strcmp(g->name, "ga10b") == 0) {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GA100;
+	} else {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	}
 	g->params.gpu_impl = NV_PMC_BOOT_0_IMPLEMENTATION_B;
 
 	/*
@@ -969,7 +986,11 @@ int test_acr_init(struct unit_module *m,
 	/*
 	 * Case 3: enable debug mode for branch coverage
 	 */
-	g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	if (strcmp(g->name, "ga10b") == 0) {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GA100;
+	} else {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	}
 	g->params.gpu_impl = NV_PMC_BOOT_0_IMPLEMENTATION_B;
 	g->acr = NULL;
 	debug_mode_enable = pwr_pmu_scpctl_stat_debug_mode_m();
@@ -986,7 +1007,11 @@ int test_acr_init(struct unit_module *m,
 	/*
 	 * HAL init parameters for gv11b
 	 */
-	g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	if (strcmp(g->name, "ga10b") == 0) {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GA100;
+	} else {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	}
 	g->params.gpu_impl = NV_PMC_BOOT_0_IMPLEMENTATION_B;
 	nvgpu_posix_io_writel_reg_space(g, pwr_pmu_scpctl_stat_r(), 0x0);
 	g->acr = NULL;
diff --git a/userspace/units/falcon/falcon_tests/falcon.c b/userspace/units/falcon/falcon_tests/falcon.c
index b12dc7317..bdb75fba7 100644
--- a/userspace/units/falcon/falcon_tests/falcon.c
+++ b/userspace/units/falcon/falcon_tests/falcon.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2022, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -49,6 +49,8 @@ static u32 *rand_test_data;
 
 #define NV_PMC_BOOT_0_ARCHITECTURE_GV110	(0x00000015 << \
 						 NVGPU_GPU_ARCHITECTURE_SHIFT)
+#define NV_PMC_BOOT_0_ARCHITECTURE_GA100	(0x00000017 << \
+						 NVGPU_GPU_ARCHITECTURE_SHIFT)
 #define NV_PMC_BOOT_0_IMPLEMENTATION_B		0xB
 #define MAX_MEM_TYPE				(MEM_IMEM + 1)
 
@@ -149,8 +151,12 @@ static int init_falcon_test_env(struct unit_module *m, struct gk20a *g)
 		return -ENOMEM;
 	}
 
-	/* HAL init parameters for gv11b */
-	g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	/* HAL init parameters for gv11b and ga10b */
+	if (strcmp(g->name, "ga10b") == 0) {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GA100;
+	} else {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	}
 	g->params.gpu_impl = NV_PMC_BOOT_0_IMPLEMENTATION_B;
 
 	/* HAL init required for getting the falcon ops initialized. */
diff --git a/userspace/units/fuse/nvgpu-fuse.c b/userspace/units/fuse/nvgpu-fuse.c
index d55a7e528..946a0ecb1 100644
--- a/userspace/units/fuse/nvgpu-fuse.c
+++ b/userspace/units/fuse/nvgpu-fuse.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2021, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2018-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -41,6 +41,8 @@
 
 #define NV_PMC_BOOT_0_ARCHITECTURE_GV110	(0x00000015 << \
 						 NVGPU_GPU_ARCHITECTURE_SHIFT)
+#define NV_PMC_BOOT_0_ARCHITECTURE_GA100	(0x00000017 << \
+						 NVGPU_GPU_ARCHITECTURE_SHIFT)
 #define NV_PMC_BOOT_0_IMPLEMENTATION_B		0xB
 
 /*
@@ -119,7 +121,11 @@ int test_fuse_device_common_init(struct unit_module *m,
 	g->params.gpu_arch = args->gpu_arch << NVGPU_GPU_ARCHITECTURE_SHIFT;
 	g->params.gpu_impl = args->gpu_impl;
 #else
-	g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	if (strcmp(g->name, "ga10b") == 0) {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GA100;
+	} else {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	}
 	g->params.gpu_impl = NV_PMC_BOOT_0_IMPLEMENTATION_B;
 #endif
 
diff --git a/userspace/units/ltc/nvgpu-ltc.c b/userspace/units/ltc/nvgpu-ltc.c
index 83392d2b1..4ecb4d4f2 100644
--- a/userspace/units/ltc/nvgpu-ltc.c
+++ b/userspace/units/ltc/nvgpu-ltc.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2022, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -45,6 +45,8 @@
 #include "nvgpu-ltc.h"
 
 #define NV_PMC_BOOT_0_ARCHITECTURE_GV110	(0x00000015 << \
+						 NVGPU_GPU_ARCHITECTURE_SHIFT)
+#define NV_PMC_BOOT_0_ARCHITECTURE_GA100	(0x00000017 << \
 					NVGPU_GPU_ARCHITECTURE_SHIFT)
 #define NV_PMC_BOOT_0_IMPLEMENTATION_B		0xB
 
@@ -117,9 +119,13 @@ int test_ltc_init_support(struct unit_module *m,
 	(void)nvgpu_posix_register_io(g, &netlist_test_reg_callbacks);
 
 	/*
-	 * HAL init parameters for gv11b
+	 * HAL init parameters for gv11b and ga10b
 	*/
-	g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	if (strcmp(g->name, "ga10b") == 0) {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GA100;
+	} else {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	}
 	g->params.gpu_impl = NV_PMC_BOOT_0_IMPLEMENTATION_B;
 
 	/*
diff --git a/userspace/units/netlist/nvgpu-netlist.c b/userspace/units/netlist/nvgpu-netlist.c
index 24d200d53..8213d4095 100644
--- a/userspace/units/netlist/nvgpu-netlist.c
+++ b/userspace/units/netlist/nvgpu-netlist.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2020, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -42,6 +42,8 @@
 
 #define NV_PMC_BOOT_0_ARCHITECTURE_GV110	(0x00000015 << \
 					NVGPU_GPU_ARCHITECTURE_SHIFT)
+#define NV_PMC_BOOT_0_ARCHITECTURE_GA100	(0x00000017 << \
+					NVGPU_GPU_ARCHITECTURE_SHIFT)
 #define NV_PMC_BOOT_0_IMPLEMENTATION_B		0xB
 
 /*
@@ -100,9 +102,13 @@ int test_netlist_init_support(struct unit_module *m,
 	(void)nvgpu_posix_register_io(g, &netlist_test_reg_callbacks);
 
 	/*
-	 * HAL init parameters for gv11b
+	 * HAL init parameters for gv11b and ga10b
 	*/
-	g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	if (strcmp(g->name, "ga10b") == 0) {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GA100;
+	} else {
+		g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	}
 	g->params.gpu_impl = NV_PMC_BOOT_0_IMPLEMENTATION_B;
 
 	/*
diff --git a/userspace/units/rc/nvgpu-rc.c b/userspace/units/rc/nvgpu-rc.c
index b2d120a17..d1184a30c 100644
--- a/userspace/units/rc/nvgpu-rc.c
+++ b/userspace/units/rc/nvgpu-rc.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2022, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -47,6 +47,8 @@
 
 #define NV_PMC_BOOT_0_ARCHITECTURE_GV110        (0x00000015 << \
 						NVGPU_GPU_ARCHITECTURE_SHIFT)
+#define NV_PMC_BOOT_0_ARCHITECTURE_GA100        (0x00000017 << \
+						NVGPU_GPU_ARCHITECTURE_SHIFT)
 #define NV_PMC_BOOT_0_IMPLEMENTATION_B          0xB
 
 #define assert(cond)	unit_assert(cond, goto done)
diff --git a/userspace/units/sync/nvgpu-sync.c b/userspace/units/sync/nvgpu-sync.c
index 376912c1b..3e4c69b9d 100644
--- a/userspace/units/sync/nvgpu-sync.c
+++ b/userspace/units/sync/nvgpu-sync.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2022, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -39,6 +39,8 @@
 
 #define NV_PMC_BOOT_0_ARCHITECTURE_GV110        (0x00000015 << \
 						NVGPU_GPU_ARCHITECTURE_SHIFT)
+#define NV_PMC_BOOT_0_ARCHITECTURE_GA100        (0x00000017 << \
+						NVGPU_GPU_ARCHITECTURE_SHIFT)
 #define NV_PMC_BOOT_0_IMPLEMENTATION_B          0xB
 
 #define assert(cond)	unit_assert(cond, goto done)