From b27524916a24bd9b3d09727f159f3e2f4d0e89e9 Mon Sep 17 00:00:00 2001 From: David Li Date: Tue, 31 Aug 2021 01:29:24 -0700 Subject: [PATCH] gpu: nvgpu: ga10b fix zcull sm_num_rcp_conservative -calculate sm_num_rcp_conservative correctly using TPC total from all GPCs -register manual says use SM count but it's actually TPC count bug 3370219 Change-Id: I4422fb09d3a59879394e0e1abc5513efc6355b5b Signed-off-by: David Li Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2586399 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-mobile-cert Reviewed-by: Gangzheng Tong Reviewed-by: svc_kernel_abi Reviewed-by: Seema Khowala Reviewed-by: mobile promotions Tested-by: Gangzheng Tong Tested-by: mobile promotions GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/hal/gr/zcull/zcull_gm20b.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/nvgpu/hal/gr/zcull/zcull_gm20b.c b/drivers/gpu/nvgpu/hal/gr/zcull/zcull_gm20b.c index 233a292e1..b0239da9c 100644 --- a/drivers/gpu/nvgpu/hal/gr/zcull/zcull_gm20b.c +++ b/drivers/gpu/nvgpu/hal/gr/zcull/zcull_gm20b.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -70,9 +70,11 @@ int gm20b_gr_init_zcull_hw(struct gk20a *g, } } - /* ceil(1.0f / SM_NUM * gr_gpc0_zcull_sm_num_rcp_conservative__max_v()) */ + /* ceil(1.0f / SM_NUM * gr_gpc0_zcull_sm_num_rcp_conservative__max_v()) + * sm_num in the register manual actually means TPC count + */ rcp_conserv = DIV_ROUND_UP(gr_gpc0_zcull_sm_num_rcp_conservative__max_v(), - nvgpu_gr_config_get_gpc_tpc_count(gr_config, 0U)); + nvgpu_gr_config_get_tpc_count(gr_config)); for (gpc_index = 0; gpc_index < nvgpu_gr_config_get_gpc_count(gr_config);