From b361c38bcafa4f985f525b926a80b1321dea9359 Mon Sep 17 00:00:00 2001
From: tkudav <tkudav@nvidia.com>
Date: Fri, 7 Dec 2018 15:06:33 +0530
Subject: [PATCH] gpu: nvgpu: Fix MISRA 15.7 violation in priv_ring

MISRA 15.7 does not allow empty terminating "else" statement.
Add INFO level print in the else condition to conform to
MISRA 15.7.

JIRA NVGPU-1490

Change-Id: If4da58f874cf84ccce20e01075e05a1d1ade37fc
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1967591
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
---
 drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.c b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.c
index 292a302a5..06738bb4a 100644
--- a/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.c
+++ b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.c
@@ -96,6 +96,9 @@ void gp10b_priv_ring_decode_error_code(struct gk20a *g,
 			nvgpu_err(g, "%s",
 				error_type_badf5xyy[error_type_index]);
 		}
+	} else {
+		nvgpu_log_info(g, "Decoding error code 0x%x not supported.",
+				error_code);
 	}
 }