nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-23 18:16:01 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: make .tsg_unbind_channel one layer lower

Browse Source 
The message to tell RM server to unbind channel has to be sent after
client unbinds the channel and before client calls tsg release. The
channel has to belong to a tsg on RM server before client submit a
runlist to remove the channel. Or there's a bare channel problem.

By moving .tsg_unbind_channl one layer lower, gk20a_tsg_unbind_channel()
will be common functions for all chip, and it'll call tsg release after
call .tsg_unbind_channel. So vgpu won't need to worry about tsg was
released before sending msg to RM server.

Bug 200382695
Bug 200382785

Change-Id: I32acc122f3f9d5d0628049ccf673225f9e90c87a
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1645383
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Richard Zhao
2018-01-26 11:44:12 -08:00
committed by mobile promotions
parent a9644aa443
commit b386768d32
8 changed files with 11 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/gpu/nvgpu/common/linux/vgpu/tsg_vgpu.c
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License, * under the terms and conditions of the GNU General Public License,
@@ -119,7 +119,7 @@ int vgpu_tsg_unbind_channel(struct channel_gk20a *ch)
gk20a_dbg_fn(""); gk20a_dbg_fn("");
err = gk20a_tsg_unbind_channel(ch); err = gk20a_fifo_tsg_unbind_channel(ch);
if (err) if (err)
return err; return err;

2
drivers/gpu/nvgpu/gk20a/channel_gk20a.c
View File

@@ -349,7 +349,7 @@ static void gk20a_free_channel(struct channel_gk20a *ch, bool force)
if (!nvgpu_is_enabled(g, NVGPU_DRIVER_IS_DYING)) { if (!nvgpu_is_enabled(g, NVGPU_DRIVER_IS_DYING)) {
/* abort channel and remove from runlist */ /* abort channel and remove from runlist */
if (gk20a_is_channel_marked_as_tsg(ch)) { if (gk20a_is_channel_marked_as_tsg(ch)) {
err = g->ops.fifo.tsg_unbind_channel(ch); err = gk20a_tsg_unbind_channel(ch);
if (err) if (err)
nvgpu_err(g, nvgpu_err(g,
"failed to unbind channel %d from TSG", "failed to unbind channel %d from TSG",

4
drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -150,7 +150,7 @@ int gk20a_tsg_unbind_channel(struct channel_gk20a *ch)
struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid]; struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid];
int err; int err;
err = gk20a_fifo_tsg_unbind_channel(ch); err = g->ops.fifo.tsg_unbind_channel(ch);
if (err) { if (err) {
nvgpu_err(g, "Channel %d unbind failed, tearing down TSG %d", nvgpu_err(g, "Channel %d unbind failed, tearing down TSG %d",
ch->chid, tsg->tsgid); ch->chid, tsg->tsgid);

4
drivers/gpu/nvgpu/gm20b/hal_gm20b.c
View File

@@ -1,7 +1,7 @@
/* /*
* GM20B Graphics * GM20B Graphics
* *
* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -427,7 +427,7 @@ static const struct gpu_ops gm20b_ops = {
.handle_pbdma_intr_0 = gk20a_fifo_handle_pbdma_intr_0, .handle_pbdma_intr_0 = gk20a_fifo_handle_pbdma_intr_0,
.handle_pbdma_intr_1 = gk20a_fifo_handle_pbdma_intr_1, .handle_pbdma_intr_1 = gk20a_fifo_handle_pbdma_intr_1,
.tsg_bind_channel = gk20a_tsg_bind_channel, .tsg_bind_channel = gk20a_tsg_bind_channel,
.tsg_unbind_channel = gk20a_tsg_unbind_channel, .tsg_unbind_channel = gk20a_fifo_tsg_unbind_channel,
#ifdef CONFIG_TEGRA_GK20A_NVHOST #ifdef CONFIG_TEGRA_GK20A_NVHOST
.alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf, .alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf,
.free_syncpt_buf = gk20a_fifo_free_syncpt_buf, .free_syncpt_buf = gk20a_fifo_free_syncpt_buf,

2
drivers/gpu/nvgpu/gp106/hal_gp106.c
View File

@@ -487,7 +487,7 @@ static const struct gpu_ops gp106_ops = {
.handle_pbdma_intr_0 = gk20a_fifo_handle_pbdma_intr_0, .handle_pbdma_intr_0 = gk20a_fifo_handle_pbdma_intr_0,
.handle_pbdma_intr_1 = gk20a_fifo_handle_pbdma_intr_1, .handle_pbdma_intr_1 = gk20a_fifo_handle_pbdma_intr_1,
.tsg_bind_channel = gk20a_tsg_bind_channel, .tsg_bind_channel = gk20a_tsg_bind_channel,
.tsg_unbind_channel = gk20a_tsg_unbind_channel, .tsg_unbind_channel = gk20a_fifo_tsg_unbind_channel,
#ifdef CONFIG_TEGRA_GK20A_NVHOST #ifdef CONFIG_TEGRA_GK20A_NVHOST
.alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf, .alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf,
.free_syncpt_buf = gk20a_fifo_free_syncpt_buf, .free_syncpt_buf = gk20a_fifo_free_syncpt_buf,

2
drivers/gpu/nvgpu/gp10b/hal_gp10b.c
View File

@@ -460,7 +460,7 @@ static const struct gpu_ops gp10b_ops = {
.handle_pbdma_intr_0 = gk20a_fifo_handle_pbdma_intr_0, .handle_pbdma_intr_0 = gk20a_fifo_handle_pbdma_intr_0,
.handle_pbdma_intr_1 = gk20a_fifo_handle_pbdma_intr_1, .handle_pbdma_intr_1 = gk20a_fifo_handle_pbdma_intr_1,
.tsg_bind_channel = gk20a_tsg_bind_channel, .tsg_bind_channel = gk20a_tsg_bind_channel,
.tsg_unbind_channel = gk20a_tsg_unbind_channel, .tsg_unbind_channel = gk20a_fifo_tsg_unbind_channel,
#ifdef CONFIG_TEGRA_GK20A_NVHOST #ifdef CONFIG_TEGRA_GK20A_NVHOST
.alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf, .alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf,
.free_syncpt_buf = gk20a_fifo_free_syncpt_buf, .free_syncpt_buf = gk20a_fifo_free_syncpt_buf,

2
drivers/gpu/nvgpu/gv100/hal_gv100.c
View File

@@ -500,7 +500,7 @@ static const struct gpu_ops gv100_ops = {
.deinit_eng_method_buffers = .deinit_eng_method_buffers =
gv11b_fifo_deinit_eng_method_buffers, gv11b_fifo_deinit_eng_method_buffers,
.tsg_bind_channel = gk20a_tsg_bind_channel, .tsg_bind_channel = gk20a_tsg_bind_channel,
.tsg_unbind_channel = gk20a_tsg_unbind_channel, .tsg_unbind_channel = gk20a_fifo_tsg_unbind_channel,
#ifdef CONFIG_TEGRA_GK20A_NVHOST #ifdef CONFIG_TEGRA_GK20A_NVHOST
.alloc_syncpt_buf = gv11b_fifo_alloc_syncpt_buf, .alloc_syncpt_buf = gv11b_fifo_alloc_syncpt_buf,
.free_syncpt_buf = gv11b_fifo_free_syncpt_buf, .free_syncpt_buf = gv11b_fifo_free_syncpt_buf,

2
drivers/gpu/nvgpu/gv11b/hal_gv11b.c
View File

@@ -524,7 +524,7 @@ static const struct gpu_ops gv11b_ops = {
.deinit_eng_method_buffers = .deinit_eng_method_buffers =
gv11b_fifo_deinit_eng_method_buffers, gv11b_fifo_deinit_eng_method_buffers,
.tsg_bind_channel = gk20a_tsg_bind_channel, .tsg_bind_channel = gk20a_tsg_bind_channel,
.tsg_unbind_channel = gk20a_tsg_unbind_channel, .tsg_unbind_channel = gk20a_fifo_tsg_unbind_channel,
#ifdef CONFIG_TEGRA_GK20A_NVHOST #ifdef CONFIG_TEGRA_GK20A_NVHOST
.alloc_syncpt_buf = gv11b_fifo_alloc_syncpt_buf, .alloc_syncpt_buf = gv11b_fifo_alloc_syncpt_buf,
.free_syncpt_buf = gv11b_fifo_free_syncpt_buf, .free_syncpt_buf = gv11b_fifo_free_syncpt_buf,