diff --git a/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h b/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h
index 71c19bdd6..535aceeab 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h
@@ -46,7 +46,6 @@ enum {
 	TEGRA_VGPU_CMD_ABORT = 2,
 	TEGRA_VGPU_CMD_CHANNEL_ALLOC_HWCTX = 3,
 	TEGRA_VGPU_CMD_CHANNEL_FREE_HWCTX = 4,
-	TEGRA_VGPU_CMD_GET_ATTRIBUTE = 5,
 	TEGRA_VGPU_CMD_MAP_BAR1 = 6,
 	TEGRA_VGPU_CMD_AS_ALLOC_SHARE = 7,
 	TEGRA_VGPU_CMD_AS_BIND_SHARE = 8,
@@ -59,9 +58,7 @@ enum {
 	TEGRA_VGPU_CMD_CHANNEL_SETUP_RAMFC = 17,
 	TEGRA_VGPU_CMD_CHANNEL_COMMIT_GR_CTX = 20,
 	TEGRA_VGPU_CMD_CHANNEL_ALLOC_GR_PATCH_CTX = 21,
-	TEGRA_VGPU_CMD_CHANNEL_FREE_GR_PATCH_CTX = 22,
 	TEGRA_VGPU_CMD_CHANNEL_MAP_GR_GLOBAL_CTX = 23,
-	TEGRA_VGPU_CMD_CHANNEL_UNMAP_GR_GLOBAL_CTX = 24,
 	TEGRA_VGPU_CMD_CHANNEL_COMMIT_GR_GLOBAL_CTX = 25,
 	TEGRA_VGPU_CMD_CHANNEL_LOAD_GR_GOLDEN_CTX = 26,
 	TEGRA_VGPU_CMD_CHANNEL_BIND_ZCULL = 27,
@@ -75,16 +72,12 @@ enum {
 	TEGRA_VGPU_CMD_SET_MMU_DEBUG_MODE = 35,
 	TEGRA_VGPU_CMD_SET_SM_DEBUG_MODE = 36,
 	TEGRA_VGPU_CMD_REG_OPS = 37,
-	TEGRA_VGPU_CMD_CHANNEL_SET_PRIORITY = 38,
-	TEGRA_VGPU_CMD_CHANNEL_SET_RUNLIST_INTERLEAVE = 39,
-	TEGRA_VGPU_CMD_CHANNEL_SET_TIMESLICE = 40,
 	TEGRA_VGPU_CMD_FECS_TRACE_ENABLE = 41,
 	TEGRA_VGPU_CMD_FECS_TRACE_DISABLE = 42,
 	TEGRA_VGPU_CMD_FECS_TRACE_POLL = 43,
 	TEGRA_VGPU_CMD_FECS_TRACE_SET_FILTER = 44,
 	TEGRA_VGPU_CMD_CHANNEL_SET_SMPC_CTXSW_MODE = 45,
 	TEGRA_VGPU_CMD_CHANNEL_SET_HWPM_CTXSW_MODE = 46,
-	TEGRA_VGPU_CMD_CHANNEL_FREE_HWPM_CTX = 47,
 	TEGRA_VGPU_CMD_GR_CTX_ALLOC = 48,
 	TEGRA_VGPU_CMD_GR_CTX_FREE = 49,
 	TEGRA_VGPU_CMD_TSG_BIND_CHANNEL = 52,