gpu: nvgpu: disable/clear PMU IRQs on power off

While tearing down PMU state during power off, nvgpu doesn't disable
the PMU interrupts. Disable them unconditionally.

Bug 200457485

Change-Id: Ia2462d879c1e7bbb4b5e8295ce211c38567c13e5
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1939025
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1951361
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
This commit is contained in:
Sagar Kamble
2018-10-30 12:34:17 +05:30
committed by mobile promotions
parent 3686634b2a
commit b3bda98fbd

View File

@@ -565,6 +565,7 @@ int nvgpu_pmu_destroy(struct gk20a *g)
g->pg_gating_cnt += pg_stat_data.gating_cnt; g->pg_gating_cnt += pg_stat_data.gating_cnt;
nvgpu_mutex_acquire(&pmu->isr_mutex); nvgpu_mutex_acquire(&pmu->isr_mutex);
g->ops.pmu.pmu_enable_irq(pmu, false);
pmu->isr_enabled = false; pmu->isr_enabled = false;
nvgpu_mutex_release(&pmu->isr_mutex); nvgpu_mutex_release(&pmu->isr_mutex);